Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration

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Parallelizing fundamental algorithms such as sorting on multi-core processors for EDA acceleration

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Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

SESSION: EDA acceleration using new architectures table of contents

Pages 230-233

Year of Publication: 2009

ISBN:978-1-4244-2748-2

Author

Masato Edahiro

University of Tokyo, Tokyo, Japan

Sponsors

: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 19, Downloads (12 Months): 70, Citation Count: 0

Additional Information:

abstract references collaborative colleagues

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ABSTRACT

Fundamental algorithms should be parallelized to accelerate EDA software on multi-core architecture. In this paper, we introduce scalable algorithms that have scalability on multi-cores. As an example, a sorting algorithm, called Map Sort, is presented. This algorithm uses a map from subsets of input data to intervals on data range. Experimental results show that, in comparison with quick sort on a single CPU, processing time of Map Sort is comparable on a CPU and three times faster on four CPUs.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Intel, Multi-Core Processors. Making the Move to Quad-Core and Beyond, White Paper, 2006.
	2	J. Friedrich, et al., "Design of the Power6 Microprocessor", ISSCC 2007, pp. 96--97, 2007.
	3	http://www.openmp.org/
	4	http://www.kasahara.elec.waseda.ac.jp/
	5	Robert Sedgewick, Algorithms in C, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1990
	6	M. Edahiro and Y. Yamashita, "Map Sort: A Scalable Sorting Algorithm for Multi-Core Processors," IPSJ Report (SLDM) (in Japanese), No. 27 (Mar., 2007), pp. 19--24, 2007.

Collaborative Colleagues:

Masato Edahiro: colleagues

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