ACM Home Page
Please provide us with feedback. Feedback
Digital Library logoTake a look at the new version of this page: [ beta version ]. Tell us what you think.
A UML-based approach for heterogeneous IP integration
Full text PdfPdf (204 KB)
Source
Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents
Yokohama, Japan
SESSION: MPSoC and IP integration table of contents
Pages: 155-160  
Year of Publication: 2009
ISBN:978-1-4244-2748-2
Authors
Sun Zhenxin  National University of Singapore, Singapore
Wong Weng-Fai  National University of Singapore, Singapore
Sponsors
: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology
Publisher
IEEE Press  Piscataway, NJ, USA
Bibliometrics
Downloads (6 Weeks): 3,   Downloads (12 Months): 38,   Citation Count: 0
Additional Information:

abstract   references   collaborative colleagues  

Tools and Actions: Review this Article  

ABSTRACT

With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ever. On the other hand, there is a constant pressure on reducing the time to market. However, as the IP blocks are provided by different vendors, they differ in their interfaces. In order to improve design reuse, methods for combining heterogeneous IP blocks with incompatible protocols and I/Os are needed. In this paper, we propose an interface synthesis method that uses the UML notation to model the interfaces of predefined components and glue logic within the standard OCP-compliant environment. We built a code generator to produce the interface adapters from the UML models. We experimented with our approach using simple-bus and a MPEG-2 decoder as case studies.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Borriello G., Chou P., Ortega R, "Embedded System Co-Design: Towards Portability and Rapid Integration, Hardware/Software Codesign", NATO ASI Series, pp. 1--28, 1996
 
2
Chandra, R., "IP-Reuse and platform base designs, system level design with embedded platforms". DAC Tutorial, 2000
 
3
 
4
 
5
Damaševičius, R., and Štuikys, V., "Soft IP customization models based on high-level abstractions", Information Technology and Control, Kaunas, Technologija, Vol. 34, No. 2, pp. 125--134. 2005
 
6
Feig, E., and Linzer, E., "Discrete cosine transform algorithms for image data compression", Proceedings of Electronic Imaging '90 East, pp. 84--87, 1990.
 
7
Guo, Z., Mitra, A., and Najjar, W., "Automation of IP core interface generation for reconfigurable computing", Int. Conference on Field Programmable Logic and Applications (FPL 2006), Madrid, Spain, August, 2006.
 
8
 
9
Kun, T., Wang, H., and Bian, J. N., "A generic interface modeling approach for SOC design", ICSICT'04, pp. 1400--1403, Beijing, 2004.
 
10
 
11
Moving Picture Experts Group. http://www.mpeg.org.
 
12
Mukherjee, R., Jones, A., and Banerjee, P., "System level synthesis of multiple IP blocks in the behavioral synthesis tool", Int. Conf. on Parallel and Distributed Computing and Systems (PDCS), November 2003.
 
13
OCP-IP, http://www.ocp-ip.org.
 
14
OMG UML documentation, http://www.uml.org
 
15
 
16
Telelogic Rhapsody, http://www.telelogic.com/
 
17
SystemC: http://www.systemc.org
 
18
Velocity website. http://velocity.apache.org/
 
19
Collaborative Colleagues:
Sun Zhenxin: colleagues
Wong Weng-Fai: colleagues