An 11,424 gate-count dynamic optically reconfigurable gate array with a photodiode memory architecture

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

An 11,424 gate-count dynamic optically reconfigurable gate array with a photodiode memory architecture

Full text

Pdf (305 KB)

Source

Asia and South Pacific Design Automation Conference archive
Proceedings of the 2009 Asia and South Pacific Design Automation Conference table of contents

Yokohama, Japan

SESSION: University LSI design contest table of contents

Pages 117-118

Year of Publication: 2009

ISBN:978-1-4244-2748-2

Authors

Daisaku Seto	Shizuoka University, Hamamatsu, Shizuoka, Japan
Minoru Watanabe	Shizuoka University, Hamamatsu, Shizuoka, Japan

Sponsors

: IEEE Circuits and Systems Society
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS : Institute of Electronics, Information and Communication Engineers - Engineering Sciences Society
IPSJ SIGSLDM : Information Processing Society of Japan - SIG System LSI Design Methodology

Publisher

IEEE Press Piscataway, NJ, USA

Bibliometrics

Downloads (6 Weeks): 4, Downloads (12 Months): 11, Citation Count: 0

Additional Information:

abstract references collaborative colleagues

Tools and Actions:	Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

ABSTRACT

The world's largest 11,424 gate-count dynamic optically reconfigurable gate array VLSI chip, which is based on the use of junction capacitance of photodiodes as configuration memory, has been fabricated. The size and process of the VLSI chip are, respectively, a 96.04 mm² and a 0.35 μm-3 metal CMOS process technology. To clarify the availability of the VLSI, this paper shows an experimental result of a long retention time of its photodiode memory architecture.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	J. Mumbru, G. Panotopoulos, D. Psaltis, X. An, F. Mok, S. Ay, S. Barna, E. Fossum, "Optically Programmable Gate Array," SPIE of Optics in Computing 2000, Vol. 4089, pp. 763--771, 2000.
	2	J. Mumbru, G. Zhou, X. An, W. Liu, G. Panotopoulos, F. Mok, and D. Psaltis, "Optical memory for computing and information processing," SPIE on Algorithms, Devices, and Systems for Optical Information Processing III, Vol. 3804, pp. 14--24, 1999.
	3	M. Watanabe, F. Kobayashi, "A high-density optically reconfigurable gate array using dynamic method," International conference on Field-Programmable Logic and its Applications, pp. 261--269, 2004.

Collaborative Colleagues:

Daisaku Seto: colleagues

Minoru Watanabe: colleagues

Adobe Acrobat

QuickTime

Windows Media Player

Real Player