|
||||||||||||||||||||||||||||||||
|
||||||||||||||||||||||||||||||||
ABSTRACT
A design environment for stripe-shaped PMELA TFTs on glass has been developed and successfully tested. Cell library including standard cells, logic synthesis database, Place and Route rule, layout parasitic extraction rule and transistor models are developed. Measurement results show that the digital circuits designed in this environment work correctly. They also show that the simulation environment is accurate enough for simulating digital circuits. REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
Collaborative Colleagues:
|
||||||||||||||||||||||||||||||||