|
ABSTRACT
We present an algorithm for improving the performance of Carry-Save-Adder (CSA) style multipliers. Based on placement information, the algorithm exploits the arithmetic equivalence in the CSA multipliers and rewires to improve the slack of the multiplier.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
C. S. Wallace, "A suggestion for a fast multiplier", IEEE Trans. On Computers, vol. 13, 1964, pages 14--17.
|
| |
2
|
L. Dadda, "Some schemes for parallel multipliers", Alta Frequenza, vol. 34, 1965, pages 349--356.
|
| |
3
|
L. Dadda, "On parallel digital multipliers", Alta Frequenza, vol. 45, 1976, pages 574--580.
|
| |
4
|
W. J. Townsend, E. E. Swartzlander, Jr., and J. A. Abraham, "A comparison of Dadda and Wallace multiplier delays", Advanced Signal Processing Algorithms, Architectures and Implementations XIII. Proceedings of the SPIE, vol. 5205, 2003, pages 552--560.
|
| |
5
|
J. Hopcroft and R. M. Karp, "An n5/2 algorithm for maximum matchings in bipartite graphs", SIAM Journal. Computing, 2(4), 1973, pages 225--231.
|
 |
6
|
Jarrod A. Roy , David A. Papa , Saurabh N. Adya , Hayward H. Chan , Aaron N. Ng , James F. Lu , Igor L. Markov, Capo: robust and scalable open-source min-cut floorplacer, Proceedings of the 2005 international symposium on Physical design, April 03-06, 2005, San Francisco, California, USA
[doi> 10.1145/1055137.1055184]
|
 |
7
|
|
| |
8
|
|
| |
9
|
|
 |
10
|
|
| |
11
|
|
| |
12
|
|
| |
13
|
L. P. P. P. van Ginneken, "Buffer Placement in Distributed RC-Tree Networks for Minimal Elmore Delay", International Symposium on Circuits and Systems, 1990, pages 865--868.
|
| |
14
|
|
|