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Accurate energy breakeven time estimation for run-time power gating
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International Conference on Computer Aided Design archive
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design table of contents
San Jose, California
SESSION: Power estimation and optimization table of contents
Pages 161-168  
Year of Publication: 2008
ISBN ~ ISSN:1092-3152 , 978-1-4244-2820-5
Authors
Hao Xu  University of Cincinnati, Cincinnati, Ohio
Wen-Ben Jone  University of Cincinnati, Cincinnati, Ohio
Ranga Vemuri  University of Cincinnati, Cincinnati, Ohio
Sponsors
: IEEE CASS/CANDE
: IEEE Council on Electronic Design Automation (CEDA)
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Press  Piscataway, NJ, USA
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ABSTRACT

Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been proposed as a critical figure of merit of RTPG. Our research introduces the definition of average EBT in a run-time environment. We develop a method to estimate the average EBT for any given circuit block, considering the impact of circuit states. HSPICE simulation results on ISCAS85 benchmark circuits show that the average EBT model has on the average 1.8% error. The CAD tool implemented based on the model can perform fast estimations with a speedup of 3000 x over HSPICE.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Hao Xu: colleagues
Wen-Ben Jone: colleagues
Ranga Vemuri: colleagues