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Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification
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International Conference on Computer Aided Design archive
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design table of contents
San Jose, California
SESSION: Test power and temperature control table of contents
Pages 52-58  
Year of Publication: 2008
ISBN ~ ISSN:1092-3152 , 978-1-4244-2820-5
Authors
Kohei Miyase  Kyushu Institute of Technology, Iizuka, Japan
Kenji Noda  STARC Yokohama, Japan
Hideaki Ito  STARC Yokohama, Japan
Kazumi Hatayama  STARC Yokohama, Japan
Takashi Aikyo  STARC Yokohama, Japan
Yuta Yamato  Kyushu Institute of Technology, Iizuka, Japan
Hiroshi Furukawa  Kyushu Institute of Technology, Iizuka, Japan
Xiaoqing Wen  Kyushu Institute of Technology, Iizuka, Japan
Seiji Kajihara  Kyushu Institute of Technology, Iizuka, Japan
Sponsors
: IEEE CASS/CANDE
: IEEE Council on Electronic Design Automation (CEDA)
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Press  Piscataway, NJ, USA
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Downloads (6 Weeks): 9,   Downloads (12 Months): 47,   Citation Count: 0
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ABSTRACT

Test data modification based on test relaxation and X-filling is the preferable approach for reducing excessive IR-drop in at-speed scan testing to avoid test-induced yield loss. However, none of the existing test relaxation methods can control the distribution of identified don't care bits (X-bits), thus adversely affecting the effectiveness of IR-drop reduction. In this paper, we propose a novel test relaxation method, called Distribution-Controlling X-Identification (DC-XID), which controls the distribution of X-bits identified from a set of fully-specified test vectors for the purpose of effectively reducing IR-drop. Experimental results on large industrial circuits demonstrate the effectiveness and practicality of the proposed method in reducing IR-drop, without any impact on fault coverage, test data volume, or test circuit size.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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J. Saxena, K. Butler, V. B. Jayaram, and S. Kundu, "A Case Study of IR-drop in Structured At-Speed Testing," Proc. Int'l Test Conf., pp. 1098--1104, 2003.
 
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X. Wen, K. Miyase, S. Kajihara, T. Suzuki, Y. Yamato, P. Girard, Y. Ohsumi, and L. T. Wang, "A Novel Scheme to Reduce Power Supply Noise for High-Quality At-Speed Scan Testing," Proc. Int'l Test Conf., Paper 25.1, 2007.
 
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K. Miyase and S. Kajihara, "XID: Don't Care Identification of Test Patterns for Combinational Circuits," IEEE Trans. on Computer-Aided Design, Vol. 23, No. 2, pp. 321--326, Feb. 2004.
 
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A. H. El-Maleh and K. Al-Utaibi, "An Efficient Test Relaxation Technique for Synchronous Sequential Circuits," IEEE Trans. on Computer-Aided Design, Vol. 23, No. 6, pp. 933--940, June 2004.
 
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J. Wang, D. Walker, A. Majhi, B. Kruseman, and S. Eichenberger, "Power Supply Noise in Delay Testing", Proc. ITC, Paper 17.3, 2006.
 
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Collaborative Colleagues:
Kohei Miyase: colleagues
Kenji Noda: colleagues
Hideaki Ito: colleagues
Kazumi Hatayama: colleagues
Takashi Aikyo: colleagues
Yuta Yamato: colleagues
Hiroshi Furukawa: colleagues
Xiaoqing Wen: colleagues
Seiji Kajihara: colleagues