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Architecting parallel programs
Source
International Conference on Computer Aided Design archive
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design table of contents
San Jose, California
SESSION: Tutorials table of contents
Article No. 4  
Year of Publication: 2008
ISBN ~ ISSN:1092-3152 , 978-1-4244-2820-5
Authors
Joel Phillips  Cadence Research Labs, Berkeley, CA
Kurt Keutzer  Univ. of California, Berkeley, CA
Michael Wrinn  Intel Corp., Hillsboro, OR
Sponsors
: IEEE CASS/CANDE
: IEEE Council on Electronic Design Automation (CEDA)
SIGDA: ACM Special Interest Group on Design Automation
Publisher
IEEE Press  Piscataway, NJ, USA
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ABSTRACT

The current shift from sequential to multicore and manycore processors presents serious challenges to software developers. A significant part of the industrial and research communities believes that either a) they can squeak by or b) the right compiler, parallel language etc will save them. Such ad hoc responses are likely to prove neither correct nor sustainable. To systematically find and exploit parallelism, and to achieve forward scalability --- that is, designs which efficiently scale to much larger numbers of cores --- will require re-architecting software applications such as EDA.

We believe that the key to re-architecting software is the use of design patterns and a pattern language. Furthermore, structural patterns (aka architectural styles) and computational patterns (aka the thirteen dwarfs) are the key high-level design patterns. The patterns are then used to create programming frameworks that can be used to facilitate implementation of the software architecture.

This tutorial presents the most recent research results by UC Berkeley and Intel. We will present our working pattern language and give examples on its use in EDA and other application areas.

Collaborative Colleagues:
Joel Phillips: colleagues
Kurt Keutzer: colleagues
Michael Wrinn: colleagues