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Measuring and modeling variabilityusing low-cost FPGAs
Source
International Symposium on Field Programmable Gate Arrays archive
Proceeding of the ACM/SIGDA international symposium on Field programmable gate arrays table of contents
Monterey, California, USA
POSTER SESSION: Architectures & applications table of contents
Pages 286-286  
Year of Publication: 2009
ISBN:978-1-60558-410-2
Authors
Michael Brown  University of California, Santa Cruz, Santa Cruz, CA, USA
Cyrus Bazeghi  University of California, Santa Cruz, Santa Cruz, CA, USA
Matthew Guthaus  University of California, Santa Cruz, Santa Cruz, CA, USA
Jose Renau  University of California, Santa Cruz, Santa Cruz, CA, USA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

The focus of this paper is to measure and qualify high-level process variation models by measuring variability on FPGAs. Measurements are done with high spatial resolution and demonstrate how the high-resolution data matches two industry test cases. The benefit of such an approach is that several inexpensive FPGAs, which are normally on the leading edge of technologies compared to ASICs, obviate the need of fabricating many custom test chips. Specifically, our evaluation shows how measurements of an Altera Cyclone II FPGA can be used to derive variability models for several 90nm commercial designs such as the Sun Niagara and Intel Pentium D. Even though the FPGAs and commercial processors are produced by different fabs (TSMC, TI, and Intel, respectively), we find the FPGAs to be very useful for predicting variation in the commercial processors.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Michael Brown: colleagues
Cyrus Bazeghi: colleagues
Matthew Guthaus: colleagues
Jose Renau: colleagues