HW/SW methodologies for synchronization in FPGA multiprocessors

ABSTRACT

odern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyping or even for final implementation. Nevertheless, efficient synchronization is required to guarantee performance in multiprocessing environments with the simple cores that do not support atomic instructions and are normally used in the standard FPGA toolchains. In this paper, we introduce two hardware synchronization modules for Xilinx MicroBlaze systems, with local polling or queuing mechanisms for locks and barriers, and present a comparison of these solutions to alternative designs.

REFERENCES

• 1: John M. Mellor-Crummey , Michael L. Scott, Algorithms for scalable synchronization on shared-memory multiprocessors, ACM Transactions on Computer Systems (TOCS), v.9 n.1, p.21-65, Feb. 1991 [doi>10.1145/103727.103729]
• 2: Altera Corporation, 101 Innovation Drive, San Jose, California 95134, USA. Nios II Core Implementation Details, v8.0.0 edition, 2008. http://www.altera.com.
• 3: ARM Cortex-M1 processor. Available at http://www.arm.com/products/CPUs/ARM_Cortex-M1.html.
• 4: MicroBlaze Processor Reference Guide. Xilinx Corporation.
• 5: Research Accelerator for Multiple Processors (RAMP), http://ramp.eecs.berkeley.edu/.
• 6: Xilinx embedded developer kit (EDK). Xilinx Corporation.
• 7: Designing Multiprocessor Systems in Platform Studio, WP262 (v2.0) November 21, 2007, Xilinx Corporation.
• 8: XPS Mutex (v1.00a). DS631 february, 20, 2008, Xilinx Corporation.
• 9: Antonino Tumeo , Matteo Monchiero , Gianluca Palermo , Fabrizio Ferrandi , Donatella Sciuto, A design kit for a fully working shared memory multiprocessor on FPGA, Proceedings of the 17th ACM Great Lakes symposium on VLSI, March 11-13, 2007, Stresa-Lago Maggiore, Italy [doi>10.1145/1228784.1228841]

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.4 Parallel Architectures
          Subjects: Distributed architectures

Additional Classification:
  C. Computer Systems Organization
  C.0 GENERAL
      Subjects: System architectures

General Terms:
Design, Experimentation, Performance

Keywords:
fpga, multiprocessors, synchronization