Intel® atom™ processor core made FPGA-synthesizable

ABSTRACT

We present an FPGA-synthesizable version of the Intel Atom processor core, synthesized to a Virtex-5 based FPGA emulation system. To make the production Atom design in SystemVerilog synthesizable through industry standard EDA tool flow, we transformed and mapped latches in the design, converted clock gating, and replaced nonsynthesizable constructs with FPGA-synthesizable counterparts. Additionally, as the target FPGA emulator is hosted on a PC platform with the Pentium-based CPU socket that supports a significantly different front side bus (FSB) protocol from that of the Atom processor, we replaced the existing bus control logic in the Atom core with an alternate FSB protocol to communicate with the rest of the PC platform. With these efforts, we succeeded in synthesizing the entire Atom processor core to fit within a single Virtex-5 LX330 FPGA. The synthesizable Atom core runs at 50Mhz on the Pentium PC motherboard with fully functional I/O peripherals. It is capable of booting off-the-shelf MS-DOS, Windows XP and Linux operating systems, and executing standard x86 workloads.

REFERENCES

• 1: P. Alfke. Memories are Made of This. Special Edition on Xilinx Virtex-5. Xcell Journal, 2007.
• 2: T. M. Burks , K. A. Sakallah , T. N. Mudge, Identification of critical paths in circuits with level-sensitive latches, 1992 IEEE/ACM international conference proceedings on Computer-aided design, p.137-141, December 1992, Santa Clara, California, United States
• 3: Mango C.-T. Chao , Li-C Wang , Kwang-Ting Cheng , S. Kundu, Static statistical timing analysis for latch-based pipeline designs, Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design, p.468-472, November 07-11, 2004 [doi>10.1109/ICCAD.2004.1382622]
• 4: Jiri Gaisler, A Portable and Fault-Tolerant Microprocessor Based on the SPARC V8 Architecture, Proceedings of the 2002 International Conference on Dependable Systems and Networks, p.409-415, June 23-26, 2002
• 5: Ricardo E. Gonzalez, Xtensa: A Configurable and Extensible Processor, IEEE Micro, v.20 n.2, p.60-70, March 2000 [doi>10.1109/40.848473]
• 6: Michael Gschwind , Valentina Salapura , Dietmar Maurer, FPGA prototyping of a RISC processor core for embedded applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9 n.2, p.241-250, April 2001 [doi>10.1109/92.924027]
• 7: T. R. Halfhill. Intel's Tiny Atom: New Low-power Microarchitecture Rejuvenates the Embedded x86. Microprocessor Report, April 2008.
• 8: PowerPC Embedded Cores. IBM Corp, Hopewell Junction, NY, 2000.
• 9: Pentium Processor Family Developer's Manual, Volume 1: Pentium Processors. Intel Corp, 1995.
• 10: Intel64 and IA-32 Architectures Software Developer's Manual. Intel Corporation, November 2008.
• 11: Intel Atom Processor. www.intel.com/technology/atom.
• 12: Intel Demonstrates World's First Working Moorestown Platform. www.intel.com/pressroom/archive/releases/20081019comp.htm.
• 13: Dave Jaggar, ARM Architecture and Systems, IEEE Micro, v.17 n.4, p.9-11, July 1997 [doi>10.1109/MM.1997.612174]
• 14: Jin-fuw Lee , Donald T. Tang , C. K. Wong, A timing analysis algorithm for circuits with level-sensitive latches, Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design, p.743-748, November 06-10, 1994, San Jose, California, United States
• 15: Shih-Lien L. Lu , Peter Yiannacouras , Rolf Kassa , Michael Konow , Taeweon Suh, An FPGA-based Pentium® in a complete desktop system, Proceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays, February 18-20, 2007, Monterey, California, USA [doi>10.1145/1216919.1216927]
• 16: Mentor Precision RTL. www.mentor.com/products/fpga pld/synthesis/precision_rtl.
• 17: Mentor Veloce. www.mentor.com/products/fv/emulation/veloce/.
• 18: OpenCores. OpenRISC 1000 Architecture Manual.
• 19: Stuart Sutherland , Simon Davidmann , Peter Flake , Phil Moorby, System Verilog for Design: A Guide to Using System Verilog for Hardware Design and Modeling, Kluwer Academic Publishers, Norwell, MA, 2004
• 20: Synopsys. DC-FPGA. www.synopsys.com/products/dcfpga.
• 21: Synplicity FPGA Synthesis Reference Manual. Synplicity, December 2005.
• 22: Xilinx. XST. www.xilinx.com/products/design_tools/logic_design/synthesis/xst.htm.
• 23: Microblaze Processor Reference Guide, v6.0. Xilinx, June 2006.
• 24: Virtex-4 User Guide, v2.3. Xilinx, August 2007.
• 25: Virtex-5 FPGA User Guide, v3.3. Xilinx, February 2008.

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.0 General

General Terms:
Design, Measurement, Performance

Keywords:
emulator, fpga, intel atom, synthesizable core