Techniques for Design and Implementation of Secure Reconfigurable PUFs

ABSTRACT

Physically unclonable functions (PUFs) provide a basis for many security and digital rights management protocols. PUF-based security approaches have numerous comparative strengths with respect to traditional cryptography-based techniques, including resilience against physical and side channel attacks and suitability for lightweight protocols. However, classical delay-based PUF structures have a number of drawbacks including susceptibility to guessing, reverse engineering, and emulation attacks, as well as sensitivity to operational and environmental variations.

To address these limitations, we have developed a new set of techniques for FPGA-based PUF design and implementation. We demonstrate how reconfigurability can be exploited to eliminate the stated PUF limitations. We also show how FPGA-based PUFs can be used for privacy protection. Furthermore, reconfigurability enables the introduction of new techniques for PUF testing. The effectiveness of all the proposed techniques is validated using extensive implementations, simulations, and statistical analysis.

REFERENCES

• 1: Yousra M. Alkabani , Farinaz Koushanfar, Active hardware metering for intellectual property protection and security, Proceedings of 16th USENIX Security Symposium on USENIX Security Symposium, p.1-16, August 06-10, 2007, Boston, MA
• 2: Yousra Alkabani , Farinaz Koushanfar , Miodrag Potkonjak, Remote activation of ICs for piracy prevention and digital right management, Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design, November 05-08, 2007, San Jose, California
• 3: Yousra Alkabani , Tammara Massey , Farinaz Koushanfar , Miodrag Potkonjak, Input vector control for post-silicon leakage current minimization in the presence of manufacturing variability, Proceedings of the 45th annual conference on Design automation, June 08-13, 2008, Anaheim, California [doi>10.1145/1391469.1391624]
• 4: Alkabani, Y. M., Koushanfar, F. N., and Kiyavash, M. P. 2008. Trusted integrated circuits: A nondestructive hidden characteristics extraction approach. In Proceedings of the Conference on Information Hiding.
• 5: Ross J. Anderson, Security Engineering: A Guide to Building Dependable Distributed Systems, John Wiley & Sons, Inc., New York, NY, 2001
• 6: Asenov, A. 1998. Random dopant induced threshold voltage lowering and fluctuations in sub-0.1 μm MOSFET’s: A 3-d atomistic simulation study. IEEE Trans. Electron. Dev. 45, 12, 2505--2513.
• 7: K. Bernstein , D. J. Frank , A. E. Gattiker , W. Haensch , B. L. Ji , S. R. Nassif , E. J. Nowak , D. J. Pearson , N. J. Rohrer, High-performance CMOS variability in the 65-nm regime and beyond, IBM Journal of Research and Development, v.50 n.4/5, p.433-449, July 2006
• 8: Leonid Bolotnyy , Gabriel Robins, Physically Unclonable Function-Based Security and Privacy in RFID Systems, Proceedings of the Fifth IEEE International Conference on Pervasive Computing and Communications, p.211-220, March 19-23, 2007 [doi>10.1109/PERCOM.2007.26]
• 9: Brizek, J., Khan, M., Seifert, J. P., and Wheeler, D. 2005. A platform-level trust-architecture for hand-held devices. In Proceedings of the Workshop on Scalable Trusted Computing. 19--20.
• 10: Thomas H. Cormen , Clifford Stein , Ronald L. Rivest , Charles E. Leiserson, Introduction to Algorithms, McGraw-Hill Higher Education, 2001
• 11: Drimer, S. 2007. Authentication of FPGA bitstreams: Why and how. In Proceedings of the Conference on Reconfigurable Computing: Architectures, Tools and Applications. Lecture Notes in Computer Science, vol. 4419, 73--84.
• 12: Thomas Eisenbarth , Tim Güneysu , Christof Paar , Ahmad-Reza Sadeghi , Dries Schellekens , Marko Wolf, Reconfigurable trusted computing in hardware, Proceedings of the 2007 ACM workshop on Scalable trusted computing, November 02-02, 2007, Alexandria, Virginia, USA [doi>10.1145/1314354.1314360]
• 13: Feldhofer, M. and Rechberger, C. 2006. A case against currently used hash functions in RFID protocols. In Proceedings of the Workshop on RFID Security. 372--381.
• 14: Paul Friedberg , Yu Cao , Jason Cain , Ruth Wang , Jan Rabaey , Costas Spanos, Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization, Proceedings of the 6th International Symposium on Quality of Electronic Design, p.516-521, March 21-23, 2005 [doi>10.1109/ISQED.2005.82]
• 15: Fry, J. and Langhammer, M. 2005. RSA and public key cryptography in FPGAs. Tech. rep., Altera Corporation.
• 16: Blaise Gassend , Dwaine Clarke , Marten van Dijk , Srinivas Devadas, Controlled Physical Random Functions, Proceedings of the 18th Annual Computer Security Applications Conference, p.149, December 09-13, 2002
• 17: Blaise Gassend , Dwaine Clarke , Marten van Dijk , Srinivas Devadas, Silicon physical random functions, Proceedings of the 9th ACM conference on Computer and communications security, November 18-22, 2002, Washington, DC, USA [doi>10.1145/586110.586132]
• 18: Blaise Gassend , Dwaine Clarke , Marten van Dijk , Srinivas Devadas, Delay-based circuit authentication and applications, Proceedings of the 2003 ACM symposium on Applied computing, March 09-12, 2003, Melbourne, Florida [doi>10.1145/952532.952593]
• 19: Blaise Gassend , Daihyun Lim , Dwaine Clarke , Marten van Dijk , Srinivas Devadas, Identification and authentication of integrated circuits: Research Articles, Concurrency and Computation: Practice & Experience, v.16 n.11, p.1077-1098, September 2004 [doi>10.1002/cpe.v16:11]
• 20: Benjamin Glas , Alexander Klimm , Oliver Sander , Klaus Müller-Glaser , Jürgen Becker, A system architecture for reconfigurable trusted platforms, Proceedings of the conference on Design, automation and test in Europe, March 10-14, 2008, Munich, Germany [doi>10.1145/1403375.1403505]
• 21: Jorge Guajardo , Sandeep S. Kumar , Geert-Jan Schrijen , Pim Tuyls, FPGA Intrinsic PUFs and Their Use for IP Protection, Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems, September 10-13, 2007, Vienna, Austria [doi>10.1007/978-3-540-74735-2_5]
• 22: Guneysu, T., Moller, B., and Paar, C. 2007. Dynamic intellectual property protection for reconfigurable devices. In Proceedings of the International Conference on Field-Programmable Technology (ICFPT), 169--176.
• 23: Hoeneisen, B. and Mead, C. A. 1972. Fundamental limitations in microelectronics I-MOS technology. Solid-State Electron. 15, 7, 819--829.
• 24: Jie, L. and Lach, J. 2008. At-speed delay characterization for IC authentication and trojan horse detection. In Proceedings of the International Workshop on Hardware-Oriented Security and Trust(HOST). 8--14.
• 25: Keyes, R. 1975. Physical limits in digital electronics. Proc. IEEE 63, 5, 740--767.
• 26: Farinaz Koushanfar , Miodrag Potkonjak, CAD-based security, cryptography, and digital rights management, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California [doi>10.1145/1278480.1278547]
• 27: Farinaz Koushanfar , Gang Qu, Hardware metering, Proceedings of the 38th conference on Design automation, p.490-493, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.378568]
• 28: Farinaz Koushanfar , Gang Qu , Miodrag Potkonjak, Intellectual Property Metering, Proceedings of the 4th International Workshop on Information Hiding, p.81-95, April 25-27, 2001
• 29: Kumar, S., Guajardo, J., Maes, R., Schrijen, G.-J., and Tuyls, P. 2008. The butterfly PUF protecting IP on every FPGA. In Proceedings of the International Workshop on Hardware-Oriented Security and Trust (HOST). 67--70.
• 30: Kuon, I., Tessier, R., and Rose, J. 2008. FPGA Architecture. Now Publishers.
• 31: Lee, J., Daihyun, L., Gassend, B., Suh, G., van Dijk, M., and Devadas, S. 2004. A technique to build a secret key in integrated circuits for identification and authentication applications. In Proceedings of the Symposium of VLSI Circuits. 176--179.
• 32: Lofstrom, K., Daasch, W., and Taylor, D. 2000. IC identification circuits using device mismatch. In Proceedings of the International Solid-State Circuits Conference (ISSCC). 372--373.
• 33: Maeda, S., Kuriyama, H., Ipposhi, T., Maegawa, S., Inoue, Y., Inuishi, M., Kotani, N., and Nishimura, T. 2003. An artificial fingerprint device (AFD): a study of identification number applications utilizing characteristics variation of polycrystalline silicon TFTs. IEEE Trans. Electron. Dev. 50, 6, 1451--1458.
• 34: Mehrdad Majzoobi , Farinaz Koushanfar , Miodrag Potkonjak, Lightweight secure PUFs, Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design, November 10-13, 2008, San Jose, California
• 35: Majzoobi, M., Koushanfar, F., and Potkonjak, M. 2008b. Testing techniques for hardware security. In Proceedings of the International Test Conference (ITC). 1--10.
• 36: Carver A. Mead, Scaling of MOS technology to submicrometer feature sizes, Analog Integrated Circuits and Signal Processing, v.6 n.1, p.9-25, July 1994 [doi>10.1007/BF01250732]
• 37: Ozturk, E., Hammouri, G., and Sunar, B. 2008. Physical unclonable function with tristate buffers. In Proceedings of the IEEE International Symposium on Circuits and Systems. 3194--3197.
• 38: Erdinç Öztürk , Ghaith Hammouri , Berk Sunar, Towards Robust Low Cost Authentication for Pervasive Devices, Proceedings of the 2008 Sixth Annual IEEE International Conference on Pervasive Computing and Communications, p.170-178, March 17-21, 2008 [doi>10.1109/PERCOM.2008.54]
• 39: Pappu, R., Recht, B., Taylor, J., and Gershenfeld, N. 2002. Physical one-way functions. Science 297, 2026--2030.
• 40: Charles P. Pfleeger, Security in computing, Prentice-Hall, Inc., Upper Saddle River, NJ, 1996
• 41: Sedcole, P. and Cheung, P. Y. K. 2006. Within-die delay variability in 90nm FPGAs and beyond. In Proceedings of the International Conference on Field-Programmable Technology (FPT). 97--104.
• 42: Davood Shamsi , Petros Boufounos , Farinaz Koushanfar, Noninvasive leakage power tomography of integrated circuits by compressive sensing, Proceeding of the thirteenth international symposium on Low power electronics and design, August 11-13, 2008, Bangalore, India [doi>10.1145/1393921.1394011]
• 43: Su, Y., Holleman, J., and Otis., B. 2007. A 1.6J/bit stable chip ID generating circuit using process variations. In Proceedings of the International Solid State Circuits Conference (ISSCC). 606--611.
• 44: G. Edward Suh , Srinivas Devadas, Physical unclonable functions for device authentication and secret key generation, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California [doi>10.1145/1278480.1278484]
• 45: Berk Sunar , William J. Martin , Douglas R. Stinson, A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks, IEEE Transactions on Computers, v.56 n.1, p.109-119, January 2007 [doi>10.1109/TC.2007.4]
• 46: Steve Trimberger, Trusted design in FPGAs, Proceedings of the 44th annual conference on Design automation, June 04-08, 2007, San Diego, California [doi>10.1145/1278480.1278483]
• 47: Tuyls, P., Schrijen, G.-J., Skonc, B., van Geloven, J., Verhaegh, N., and Wotters, R. 2006. Read-proof hardware from protective coatings. In Proceedings of the Cryptographic Hardware and Embedded Systems Workshop. 369--383.
• 48: Thomas Wollinger , Jorge Guajardo , Christof Paar, Security on FPGAs: State-of-the-art implementations and attacks, ACM Transactions on Embedded Computing Systems (TECS), v.3 n.3, p.534-574, August 2004 [doi>10.1145/1015047.1015052]
• 49: Wong, J. S. J., Sedcole, P., and Cheung, P. Y. K. 2007. Self-characterization of combinatorial circuit delays in FPGAs. In Proceedings of the International Conference on Field-Programmable Technology. 17--23.

INDEX TERMS

General Terms:
Design, Reliability, Security

Keywords:
Reconfigurable systems, hardware security, physically unclonable functions, process variation