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Expanded single-chip principles in practical application
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Source AFIPS Joint Computer Conferences archive
Proceedings of the June 7-10, 1982, national computer conference table of contents
Houston, Texas
SESSION: Hardware/computer architecture table of contents
Pages 73-79  
Year of Publication: 1982
ISBN ~ ISSN:0095-6880 , 0-88283-035-X
Author
Randy M. Dumse  Rockwell International
Sponsor
AFIPS : American Federation of Information Processing Societies
Publisher
ACM  New York, NY, USA
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ABSTRACT

For the past two decades the semiconductor industry has been in a headlong rush to pack more and more features on a single piece of silicon. The creation of the microprocessor as a single LSI device naturally gave inspiration for further advances. The microcomputer on a chip followed quickly and was again a technological stepping point rather than a final goal. New generations and process development variations made possible larger, faster, and more powerful systems on a chip. There is, however, a limit on the amount of CPU, ROM, RAM, and special-purpose devices that can be placed on a single, easily manufactured silicon die with current technology. In order to give the cost-reducing features of a one-chip computer with the flexibility of a multichip set, the expanded single-chip computer was developed. This paper will explain the theory behind that development, and then explore its application in a specific example.