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Pluribus: a reliable multiprocessor
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Source AFIPS Joint Computer Conferences archive
Proceedings of the May 19-22, 1975, national computer conference and exposition table of contents
Anaheim, California
SESSION: Interaction of technology and system architecture: new advances in processor-memory-switch architectures table of contents
Pages 551-559  
Year of Publication: 1975
Authors
S. M. Ornstein  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
W. R. Crowther  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
M. F. Kraley  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
R. D. Bressler  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
A. Michel  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
F. E. Heart  Bolt Beranek and Newman Inc., Cambridge, Massachusetts
Sponsor
AFIPS : American Federation of Information Processing Societies
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 1,   Downloads (12 Months): 14,   Citation Count: 4
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ABSTRACT

As computer technology has evolved, system architects have continually sought new ways to exploit the decreasing costs of system components. One approach has been to pull together collections of units into multiprocessor systems. Usually the objectives have been to gain increased operating power through parallelism and/or to gain increased system reliability through redundancy.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
Riley, W. B., "Minicomputer Networks---A Challenge to Maxicomputers?" Electronics, March 29, 1971, pp. 56--62.
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Ornstein, S. M., W. B. Barker, R. D. Bressler, W. R. Crowther, F. E. Heart, M. F. Kraley, A. Michel and M. J. Thrope, "The BBN Multiprocessor," Proceedings of the Seventh Annual Hawaii International Conference on System Sciences, Honolulu, Hawaii, January 1974, Computer Nets Supplement, pp. 92--95.
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McKenzie, A. A., B. P. Cosell, J. M. McQuillan and M. J. Thrope, "The Network Control Center for the ARPA Network," Proceedings of the First International Conference on Computer Communication, Washington, D.C., October 1972, pp. 185--191.
 
8
Dijkstra, E. W., "Cooperating Sequential Processes," in Programming Languages, ed. F. Genuys, Academic Press, London and New York 1968, pp. 43--112.
 
9
Butterfield, S. C., R. D. Rettberg and D. C. Walden, "The Satellite IMP for the ARPA Network," Proceedings of the Seventh Annual Hawaii International Conference on System Sciences, Honolulu, Hawaii, January 1974, Computer Nets Supplement, pp. 70--73.
 
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IBM Corporation, OS Advanced Checkpoint/Restart, IBM Manual GC28-6708.
 
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Gountanis, R. J. and N. L. Viss, "A Method of Processor Selection for Interrupt Handling in a Multiprocessor System," Proceedings of the IEEE, Vol. 54, No. 12, December 1966, pp. 1812--1819.
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Collaborative Colleagues:
S. M. Ornstein: colleagues
W. R. Crowther: colleagues
M. F. Kraley: colleagues
R. D. Bressler: colleagues
A. Michel: colleagues
F. E. Heart: colleagues