| Core cannibalization architecture: improving lifetime chip performance for multicore processors in the presence of hard faults |
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Proceedings of the 17th international conference on Parallel architectures and compilation techniques
table of contents
Toronto, Ontario, Canada
SESSION: CMP architecture design
table of contents
Pages 43-51
Year of Publication: 2008
ISBN:978-1-60558-282-5
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Downloads (6 Weeks): 12, Downloads (12 Months): 119, Citation Count: 3
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ABSTRACT
To improve the lifetime performance of a multicore chip with simple cores, we propose the Core Cannibalization Architecture (CCA). A chip with CCA provisions a fraction of the cores as cannibalizable cores (CCs). In the absence of hard faults, the CCs function just like normal cores. In the presence of hard faults, the CCs can be cannibalized for spare parts at the granularity of pipeline stages. We have designed and laid out CCA chips composed of multiple OpenRISC 1200 cores. Our results show that CCA improves the chips' lifetime performances, compared to chips without CCA.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Shantanu Gupta , Shuguang Feng , Amin Ansari , Jason Blome , Scott Mahlke, StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems, Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, October 19-24, 2008, Atlanta, GA, USA
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CITED BY 3
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Shantanu Gupta , Shuguang Feng , Amin Ansari , Jason Blome , Scott Mahlke, StageNetSlice: a reconfigurable microarchitecture building block for resilient CMP systems, Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems, October 19-24, 2008, Atlanta, GA, USA
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