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Feature selection and policy optimization for distributed instruction placement using reinforcement learning
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Proceedings of the 17th international conference on Parallel architectures and compilation techniques table of contents
Toronto, Ontario, Canada
SESSION: Compilation table of contents
Pages 32-42  
Year of Publication: 2008
ISBN:978-1-60558-282-5
Authors
Katherine E. Coons  University of Texas at Austin, Austin, TX, USA
Behnam Robatmili  University of Texas at Austin, Austin, TX, USA
Matthew E. Taylor  University of Texas at Austin, Austin, TX, USA
Bertrand A. Maher  University of Texas at Austin, Austin, TX, USA
Doug Burger  University of Texas at Austin, Austin, TX, USA
Kathryn S. McKinley  University of Texas at Austin, Austin, TX, USA
Sponsors
ACM: Association for Computing Machinery
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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ABSTRACT

Communication overheads are one of the fundamental challenges in a multiprocessor system. As the number of processors on a chip increases, communication overheads and the distribution of computation and data become increasingly important performance factors. Explicit Dataflow Graph Execution (EDGE) processors, in which instructions communicate with one another directly on a distributed substrate, give the compiler control over communication overheads at a fine granularity. Prior work shows that compilers can effectively reduce fine-grained communication overheads in EDGE architectures using a spatial instruction placement algorithm with a heuristic-based cost function. While this algorithm is effective, the cost function must be painstakingly tuned. Heuristics tuned to perform well across a variety of applications leave users with little ability to tune performance-critical applications, yet we find that the best placement heuristics vary significantly with the application.

First, we suggest a systematic feature selection method that reduces the feature set size based on the extent to which features affect performance. To automatically discover placement heuristics, we then use these features as input to a reinforcement learning technique, called Neuro-Evolution of Augmenting Topologies (NEAT), that uses a genetic algorithm to evolve neural networks. We show that NEAT outperforms simulated annealing, the most commonly used optimization technique for instruction placement. We use NEAT to learn general heuristics that are as effective as hand-tuned heuristics, but we find that improving over highly hand-tuned general heuristics is difficult. We then suggest a hierarchical approach to machine learning that classifies segments of code with similar characteristics and learns heuristics for these classes. This approach performs closer to the specialized heuristics. Together, these results suggest that learning compiler heuristics may benefit from both improved feature selection and classification.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Katherine E. Coons: colleagues
Behnam Robatmili: colleagues
Matthew E. Taylor: colleagues
Bertrand A. Maher: colleagues
Doug Burger: colleagues
Kathryn S. McKinley: colleagues