Software optimization for MPSoC: a mpeg-2 decoder case study

ABSTRACT

Using traditional software profiling to optimize embedded software in an MPSoC design is not reliable. With multiple processors running concurrently and programs interacting, traditional profiling on individual processors cannot capture useful execution information to assist software optimization. A new method to model parallel executions of interacting programs is needed. In this paper, we consider the software optimization problem for throughput-constrained MPSoC designs. We define the "longest delay path" as a sequence of steps leading to a throughput constraint violation and propose an algorithm to build up the path dynamically during simulation. Using an industrial-strength MPEG-2 decoder design in our case study and custom instructions for software optimization, we show that we can optimize the software efficiently in MPSoC designs using frequently executed statement information from the longest delay path.

REFERENCES

• 1: Vishwani D. Agrawal, Synchronous path analysis in MOS circuit simulator, Proceedings of the 19th conference on Design automation, p.629-635, January 1982
• 2: Felice Balarin , Luciano Lavagno , Praveen Murthy , Alberto Sangiovanni-vincentelli, Scheduling for Embedded Real-Time Systems, IEEE Design & Test, v.15 n.1, p.71-82, January 1998 [doi>10.1109/54.655185]
• 3: Thomas Ball , James R. Larus, Optimally profiling and tracing programs, ACM Transactions on Programming Languages and Systems (TOPLAS), v.16 n.4, p.1319-1360, July 1994 [doi>10.1145/183432.183527]
• 4: Rajeshwari Banakar , Stefan Steinke , Bo-Sik Lee , M. Balakrishnan , Peter Marwedel, Scratchpad memory: design alternative for cache on-chip memory in embedded systems, Proceedings of the tenth international symposium on Hardware/software codesign, May 06-08, 2002, Estes Park, Colorado [doi>10.1145/774789.774805]
• 5: H. Brunst, D. Kranzlmüller, and W. Nagel. Tools for scalable parallel program analysis - vampir ng and dewiz. pages 93--102. 2005.
• 6: Pohua P. Chang , Scott A. Mahlke , Wen-mei W. Hwu, Using profile information to assist classic code optimizations, Software—Practice & Experience, v.21 n.12, p.1301-1321, Dec. 1991 [doi>10.1002/spe.4380211204]
• 7: Hsi-Chuan Chen , David H. C. Du , Li-Ren Liu, Critical path selection for performance optimization, Proceedings of the 28th conference on ACM/IEEE design automation, p.547-550, June 17-22, 1991, San Francisco, California, United States [doi>10.1145/127601.127730]
• 8: Jacques Chassin de Kergommeaux , Benhur de Oliveira Stein, Pajé: An Extensible Environment for Visualizing Multi-threaded Programs Executions, Proceedings from the 6th International Euro-Par Conference on Parallel Processing, p.133-140, August 29-September 01, 2000
• 9: G. de Micheli , L. Benini, Networks on Chip: A New Paradigm for Systems on Chip Design, Proceedings of the conference on Design, automation and test in Europe, p.418, March 04-08, 2002
• 10: David Goodwin , Darin Petkov, Automatic generation of application specific processors, Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems, October 30-November 01, 2003, San Jose, California, USA [doi>10.1145/951710.951730]
• 11: R. K. Gupta and G. D. Micheli. Hardware-software cosynthesis for digital systems. pages 5--17, 2002.
• 12: Grant Martin, Overview of the MPSoC design challenge, Proceedings of the 43rd annual conference on Design automation, July 24-28, 2006, San Francisco, CA, USA [doi>10.1145/1146909.1146980]
• 13: Armita Peymandoust , Giovanni De Micheli , Tajana Simunic, Complex library mapping for embedded software using symbolic algebra, Proceedings of the 39th conference on Design automation, June 10-14, 2002, New Orleans, Louisiana, USA [doi>10.1145/513918.514003]
• 14: Greg Stitt , Frank Vahid , Shawn Nematbakhsh, Energy savings and speedups from partitioning critical software loops to hardware in embedded systems, ACM Transactions on Embedded Computing Systems (TECS), v.3 n.1, p.218-232, February 2004 [doi>10.1145/972627.972637]
• 15: Albert Wang , Earl Killian , Dror Maydan , Chris Rowen, Hardware/software instruction set configurability for system-on-chip processors, Proceedings of the 38th conference on Design automation, p.184-188, June 2001, Las Vegas, Nevada, United States [doi>10.1145/378239.378460]
• 16: Mohamed-Wassim Youssef , Sungjoo Yoo , Arif Sasongko , Yanick Paviot , Ahmed A. Jerraya, Debugging HW/SW interface for MPSoC: video encoder system design case study, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA [doi>10.1145/996566.996808]

INDEX TERMS

Primary Classification:
  D. Software
  D.2 SOFTWARE ENGINEERING
      D.2.2 Design Tools and Techniques
          Subjects: Computer-aided software engineering (CASE)

Additional Classification:
  C. Computer Systems Organization
  C.4 PERFORMANCE OF SYSTEMS
      Subjects: Design studies

General Terms:
Algorithms, Design, Performance

Keywords:
mpsoc, software optimization