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A PRAM and NAND flash hybrid architecture for high-performance embedded storage subsystems
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International Conference On Embedded Software archive
Proceedings of the 8th ACM international conference on Embedded software table of contents
Atlanta, GA, USA
SESSION: Flash memory table of contents
Pages 31-40  
Year of Publication: 2008
ISBN:978-1-60558-468-3
Authors
Jin Kyu Kim  Samsung Advanced Institute of Technology, Yongin, South Korea
Hyung Gyu Lee  Samsung Advanced Institute of Technology, Yongin, South Korea
Shinho Choi  Samsung Electronics Co. LTD, Hwaseong, South Korea
Kyoung Il Bahng  Samsung Electronics Co. LTD, Hwaseong, South Korea
Sponsors
ACM: Association for Computing Machinery
SIGBED: ACM Special Interest Group on Embedded Systems
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

NAND flash-based storage is widely used in embedded systems due to its numerous benefits: low cost, high density, small form factor and so on. However, NAND flash-based storage is still suffering from serious performance degradation for random or small size write access. This degradation mainly comes from the physical constraints of NAND flash: erase-before-program and different unit size of erase and program operations. To overcome these constraints, we propose to use PRAM (Phase-change RAM) which supports advanced features: fast byte access capability and no requirement for erase-before-program.

In this paper, we focus on developing a high-performance NAND flash-based storage system by maximally exploiting the advanced feature of PRAM, in terms of performance and wearing out. To do this, we first propose a new hybrid storage architecture which consists of PRAM and NAND flash. Second, we devise two novel software schemes for the proposed hybrid storage architecture; FSMS (File System Metadata Separation) and hFTL (hybrid Flash Translation Layer). Finally, we demonstrate that our hybrid architecture increases the performance up to 290% and doubles the lifespan compared to the existing NAND flash only storage systems.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
R. Bez, E. Camerlenghi, A. Modelli and A. Visconti, , 2003. Introduction to Flash Memory, Proceeding of the IEEE, Vol 91, No 4, 2003
 
2
G. H. Koh and et el., 2004. PRAM Process Technology. Proceeding of the IEEE International Conference on Integrated Circuit Design and Technology, 2004.
 
3
Kinam Kim and G. H. Koh, 2004. Future Memory Technology including Emerging New Memories. Proceedings of 24th International Conference on Microelectronics, NIS, Serbia and Montenegro, May, 2004.
 
4
Mun-Kyu Choi and et el., 2002. A 0.25um 3.0V 1T1C 32Mb Nonvolatile Ferroelectric RAM with Address Transition Detector and Current Forcing Latch Sense Amplifier Scheme. IEEE Journal of Solid-State Circuits 37, 2002.
 
5
J. Kim, J. M. Kim, S. Noh, S. L. Min, and Y.Cho, 2007. A space-efficient flash translation layer for CompactFlash systems, IEEE Transactions on Consumer Electronics, 48(2), pp. 366--375 (2002).
 
6
Mark DeVoss, 2007. The Winds of Phase Change are Blowing. Market Brief, iSuppli, May 2007.
 
7
 
8
Nathan K. Edel, Ethan L. Miller, Karl S. Brandt and Scott A. Brandt, 2004. Measuring the Compressibility of Metadata and Small Files for Disk/NVRAM Hybrid Storage Systems. in Proceedings of the International Symposium on Performance Evaluation of Computer and Telecommunication Systems(SPECTS'04), San Jose, CA, July (2004).
 
9
10
11
12
 
13
 
14
Intel Corporation, 1998. Understanding the flash translation layer (FTL) specification. http://developer.intel.com, 1998.
 
15
A. Ban. Flash file system. United States Patent, No. 5,404,485, April (1995).
 
16
C. Association, http://www.compactflash.org.
 
17
EETIMES, Samsung introduces working prototype of PRAM http://www.eetimes.com (2006/9/11).
 
18
IOZone benchmark, http://www.iozone.org.
19
 
20
Threaded I/O benchmark, http://sourceforge.net/projects/tiobench
 
21
Samsung Electronics, Datasheet K9G8G08UOM, 2006.
 
22
Samsung Electronics, Datasheet KPS1215EZM, 2006.

Collaborative Colleagues:
Jin Kyu Kim: colleagues
Hyung Gyu Lee: colleagues
Shinho Choi: colleagues
Kyoung Il Bahng: colleagues