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REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Alfred V. Aho , Ravi Sethi , Jeffrey D. Ullman, Compilers: principles, techniques, and tools, Addison-Wesley Longman Publishing Co., Inc., Boston, MA, 1986
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J. A. Fisher. "Trace Scheduling: A technique for global microcode compaction". IEEE Transactions on Computers, No. 7,pp. 478-490, 1981.
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Gajski, D., "An Algorithm for Solving Linear Recurrence Systems on Parallel and Pipelined Machines", IEEE, Transactions on Computers, Vol. c-30, No.3, March 1981.
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J. R. Allen, K. Kennedy, "PFC: A program to Convert Fortran to Parallel Form", Rice University Tech. Rep. MASC TR 82-6, Houston, TX, 1982.
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Kogge, P. and Stone, H., "A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations", IEEE Transactions on Computer, Vol., C-22, No.8, August 1973.
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B. Ramakrishna Rau , Christopher D. Glaeser , Raymond L. Picard, Efficient code generation for horizontal architectures: Compiler techniques and architectural support, Proceedings of the 9th annual symposium on Computer Architecture, p.131-139, April 26-29, 1982, Austin, Texas, United States
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H. Wang, A. Nicolau, "Speedup of Programs Confining Band Linear Recurrence with Resource ConstrMnts", Tech. Rep. 92-12, Department of Information and Computer Science, University of California Irvine, December, 1991.
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H. Wang, A. Nicolau, "Optimal schedules and new time bounds for parallel evaluation of band linear recurrences", Technical Report, Department of Information and Computer Science, University of California at Irvine, Jan. 1992.
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CITED BY 3
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Haigeng Wang , Nikil Dutt , Alexandru Nicolau , Kai-Yeung Sunny Siu, High-level synthesis of scalable architectures for IIR filters using multichip modules, Proceedings of the 30th international conference on Design automation, p.336-342, June 14-18, 1993, Dallas, Texas, United States
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