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A graphical comparison of RISC processors
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Source ACM SIGARCH Computer Architecture News archive
Volume 20 ,  Issue 4  (September 1992) table of contents
Pages: 2 - 8  
Year of Publication: 1992
ISSN:0163-5964
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ACM  New York, NY, USA
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Downloads (6 Weeks): 6,   Downloads (12 Months): 42,   Citation Count: 1
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ABSTRACT

A graphical approach for the comparison of RISC processors is presented in this note. Kiviat graphs summarize some of the most relevant architectural parameters of RISC designs in a more appealing manner as tables of parameters.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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[2] J. Bodenkamp, "I860 Mikroprocessor", in Arndt Bode (ed), RISC-Architekturen, Reihe Informatik, Band 60, Wissenschaftsverlag, Mannheim, 1990, pp. 431-447.
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[4] Cypress Semiconductor, SPARC RISC User's Guide, February 1990.
 
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[5] Margarita Esponda and Raul Rojas, The RISC Concept - A Survey of Implementations, Technical Report B-91-12, Freie Universität Berlin, September 1991, 42 pages.
 
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[6] Domenico Ferrari, Giuseppe Serazzi and Alessandro Zeigner, Measurement and Tuning of Computer Systems, Prentice Hall, London, 1983.
 
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[12] Gerry Kane, MIPS R2000 RISC Architecture, Prentice Hall, Englewood Cliffs, 1987.
 
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[19] E. Thurner, "Die MIPS Prozessor Familie", in Arndt Bode (ed), RISC-Architekturen, Reihe Informatik, Band 60, Wissenschaftsverlag, Mannheim, 1990, pp. 379-401.
 
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Collaborative Colleagues:
Margarita Esponda: colleagues
Raúl Rojas: colleagues