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ABSTRACT
A graphical approach for the comparison of RISC processors is presented in this note. Kiviat graphs summarize some of the most relevant architectural parameters of RISC designs in a more appealing manner as tables of parameters.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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[2] J. Bodenkamp, "I860 Mikroprocessor", in Arndt Bode (ed), RISC-Architekturen, Reihe Informatik, Band 60, Wissenschaftsverlag, Mannheim, 1990, pp. 431-447.
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Robert F. Cmelik , Shing I. Kong , David R. Ditzel , Edmund J. Kelly, An analysis of MIPS and SPARC instruction set utilization on the SPEC benchmarks, Proceedings of the fourth international conference on Architectural support for programming languages and operating systems, p.290-302, April 08-11, 1991, Santa Clara, California, United States
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[4] Cypress Semiconductor, SPARC RISC User's Guide, February 1990.
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[5] Margarita Esponda and Raul Rojas, The RISC Concept - A Survey of Implementations, Technical Report B-91-12, Freie Universität Berlin, September 1991, 42 pages.
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[6] Domenico Ferrari, Giuseppe Serazzi and Alessandro Zeigner, Measurement and Tuning of Computer Systems, Prentice Hall, London, 1983.
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[12] Gerry Kane, MIPS R2000 RISC Architecture, Prentice Hall, Englewood Cliffs, 1987.
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Chriss Stephens , Bryce Cogswell , John Heinlein , Gregory Palmer , John P. Shen, Instruction level profiling and evaluation of the IBM/6000, Proceedings of the 18th annual international symposium on Computer architecture, p.180-189, May 27-30, 1991, Toronto, Ontario, Canada
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[19] E. Thurner, "Die MIPS Prozessor Familie", in Arndt Bode (ed), RISC-Architekturen, Reihe Informatik, Band 60, Wissenschaftsverlag, Mannheim, 1990, pp. 379-401.
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