Subset barrier synchronization on a private-memory parallel system

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Subset barrier synchronization on a private-memory parallel system

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures table of contents

San Diego, California, United States

Pages: 209 - 218

Year of Publication: 1992

ISBN:0-89791-483-X

Authors

Anja Feldmann
Thomas Gross
David O'Hallaron
Thomas M. Stricker

Sponsors

SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

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Downloads (6 Weeks): 2, Downloads (12 Months): 18, Citation Count: 0

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REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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	4	Shekhar Borkar , Robert Cohn , George Cox , Thomas Gross , H. T. Kung , Monica Lam , Margie Levine , Brian Moore , Wire Moore , Craig Peterson , Jim Susman , Jim Sutton , John Urbanski , Jon Webb, Supporting systolic and memory communication in iWarp, Proceedings of the 17th annual international symposium on Computer Architecture, p.70-81, May 28-31, 1990, Seattle, Washington, United States
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	7	FELDMANN, A. Subset barrier synchronization: Communication models and implementation. Tech. Rep. CMU-CS-92- 136, School of Computer Science, Carnegie Mellon University, 1992.
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	14	O'KEEFE, M., AND DmTZ, H. Barrier MIMD architecture: Design and compilation. Tech. Rep. TR-EE 90-50, School of Electrical Engineering Purdue University, August 1990.
	15	John M. Mellor-Crummey , Michael L. Scott, Algorithms for scalable synchronization on shared-memory multiprocessors, ACM Transactions on Computer Systems (TOCS), v.9 n.1, p.21-65, Feb. 1991 [doi>10.1145/103727.103729]
	16	Thomas M. Stricker, Supporting the hypercube programming model on mesh architectures: (a fast sorter for iWarp tori), Proceedings of the fourth annual ACM symposium on Parallel algorithms and architectures, p.148-157, June 29-July 01, 1992, San Diego, California, United States [doi>10.1145/140901.140917]