Synergistic modeling and optimization for nanometer IC design/manufacturing integration

ABSTRACT

Nanometer IC design and manufacturing are facing unprecedented grand challenges for 45nm and beyond, according to ITRS. On one hand, many entangled physical effects continue to pose tremendous challenges to reach design closure with stringent turn-around-time; on the other hand, design closure no longer guarantees manufacturing closure. The conventional contracts between design and fab through design rules are breaking, due to deep sub-wavelength lithography and growing process variations. Thus design/manufacturing integration and co-optimization will become more and more important. To enable true design/process integration, it is crucial to be able to model proper manufacturing/variability/yield metrics, and feed them upstream at various physical design implementation stages. This lecture will present synergistic modeling and optimization issues on both physical and electrical design for manufacturing (DFM). We will seek to address DFM from its root causes, in a holistic manner through better manufacturing for design (e.g., variation aware lithography modeling and optical proximity correction), manufacturing-design interface (e.g., predictive silicon modeling and variational circuit analysis), and true design for manufacturing (e.g., manufacturability aware routing and variational aware clock synthesis).

INDEX TERMS

Primary Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles

Additional Classification:
  I. Computing Methodologies
  I.6 SIMULATION AND MODELING
      I.6.5 Model Development

General Terms:
Design

Keywords:
design for manufacturing