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Temperature control of high-performance multi-core platforms using convex optimization
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Source Design, Automation, and Test in Europe archive
Proceedings of the conference on Design, automation and test in Europe table of contents
Munich, Germany
SESSION: System-level power management and energy harvesting table of contents
Pages 110-115  
Year of Publication: 2008
ISBN:978-3-9810801-3-1
Authors
Srinivasan Murali  LSI, EPFL, Switzerland
Almir Mutapcic  Stanford University
David Atienza  LSI, EPFL, Switzerland and Complutense University of Madrid (UCM), Spain
Rajesh Gupta  UCSD
Stephen Boyd  Stanford University
Luca Benini  University of Bologna, Italy
Giovanni De Micheli  LSI, EPFL, Switzerland
Sponsors
: IEEE Council on Electronic Design Automation (CEDA)
EDAA : European Design Automation Association
: The EDA Consortium
SIGDA: ACM Special Interest Group on Design Automation
RAS : RAS
: The IEEE Computer Society TTTC
: ECSI
Publisher
ACM  New York, NY, USA
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ABSTRACT

With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperature. Temperature gradients and hot-spots not only affect the performance of the system, but also lead to unreliable circuit operation and affect the life-time of the chip. Meeting the temperature constraints and reducing the hot-spots are critical for achieving reliable and efficient operation of complex multi-core systems. In this work, we present Pro-Temp, a convex optimization based method that pro-actively controls the temperature of the cores, while minimizing the power consumption and satisfying application performance constraints. The method guarantees that the temperature of the cores are below a user-defined threshold at all instances of operation, while also reducing the hot-spots. We perform experiments on several realistic multicore benchmarks, which show that the proposed method guarantees that the cores never exceed the maximum temperature limit, while matching the application performance requirements. We compare this to traditional methods, where we find several temperature violations during the operation of the system.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Srinivasan Murali: colleagues
Almir Mutapcic: colleagues
David Atienza: colleagues
Rajesh Gupta: colleagues
Stephen Boyd: colleagues
Luca Benini: colleagues
Giovanni De Micheli: colleagues