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NetFPGA: reusable router architecture for experimental research
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Applications, Technologies, Architectures, and Protocols for Computer Communication archive
Proceedings of the ACM workshop on Programmable routers for extensible services of tomorrow table of contents
Seattle, WA, USA
SESSION: Programmable packet processing table of contents
Pages 1-7  
Year of Publication: 2008
ISBN:978-1-60558-181-1
Authors
Jad Naous  Stanford University, Stanford, CA, USA
Glen Gibb  Stanford University, Stanford, CA, USA
Sara Bolouki  Stanford University, Stanford, CA, USA
Nick McKeown  Stanford University, Stanford, CA, USA
Sponsors
ACM: Association for Computing Machinery
SIGCOMM: ACM Special Interest Group on Data Communication
Publisher
ACM  New York, NY, USA
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ABSTRACT

Our goal is to enable fast prototyping of networking hardware (e.g. modified Ethernet switches and IP routers) for teaching and research. To this end, we built and made available the NetFPGA platform. Starting from open-source reference designs, students and researchers create their designs in Verilog, and then download them to the NetFPGA board where they can process packets at line-rate for 4-ports of 1GE. The board is becoming widely used for teaching and research, and so it has become important to make it easy to re-use modules and designs. We have created a standard interface between modules, making it easier to plug modules together in pipelines, and to create new re-usable designs. In this paper we describe our modular design, and how we have used it to build several systems, including our IP router reference design and some extensions to it.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
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N. Dukkipati, M. Kobayashi, R. Zhang-Shen, and N. McKeown. Processor Sharing Flows in the Internet. In Thirteenth International Workshop on Quality of Service (IWQoS), 2005.
 
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M. Enachescu, Y. Ganjali, A. Goel, N. McKeown, and T. Roughgarden. Routers With Very Small Buffers. In IEEE Infocom, 2006.
 
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N. Gude, T. Koponen, J. Pettit, B. Pfaff, M. Casado, N. McKeown, and S. Shenker. NOX: Towards an Operating System for Networks. To appear.
 
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IEEE. IEEE 1588 - 2002, Precision Time Protocol. Technical report, IEEE, 2002.
 
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S. Iyer, R. R. Kompella, and N. McKeown. Designing Packet Buffers for Router Line Cards. Technical report, Stanford University High Performance Networking Group, 2002.
 
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N. McKeown, T. Anderson, H. Balakrishnan, G. Parulkar, L. Peterson, J. Rexford, S. Shenker, and J. Turner. OpenFlow: Enabling Innovation in College Networks. Soon to appear in ACM Computer Communication Review.
 
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NetFPGA Development Team. NetFPGA User's and Developer's Guide. Can be found at http://netfpga.org/static/guide.html.
 
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OpenFlow Consortium. OpenFlow Switch Specification. Available at http://openflowswitch.org/documents.html.
 
14
Stanford University. Pee-Wee OSPF Protocol Details. Can be found at http://yuba.stanford.edu/cs344 public/docs/pwospf ref.txt


Collaborative Colleagues:
Jad Naous: colleagues
Glen Gibb: colleagues
Sara Bolouki: colleagues
Nick McKeown: colleagues