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Energy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors
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International Symposium on Low Power Electronics and Design archive
Proceeding of the 13th international symposium on Low power electronics and design table of contents
Bangalore, India
SESSION: Memory systems & special-purpose hardware table of contents
Pages 247-252  
Year of Publication: 2008
ISBN:978-1-60558-109-5
Authors
Avadh Patel  State University of New York, Binghamton, NY, USA
Kanad Ghose  State University of New York, Binghamton, NY, USA
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

We present a snoop filtering mechanism for multicore microprocessors that implement coherent caches using the MESI protocol. The relatively small filter structure at each core maintains coarse-grain sharing information about regions within a page to filter out snoops. On broadcast, the sharing status of all regions within the page is collected proactively and up to 90% of unnecessary snoops are eliminated. The energy savings resulting from snoop filtering in our scheme average about 30% across the benchmarks studied for both a quad core design in 65 nm and 8-core design in 45 nm CMOS.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Collaborative Colleagues:
Avadh Patel: colleagues
Kanad Ghose: colleagues