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Advances in low power verification
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International Symposium on Low Power Electronics and Design archive
Proceeding of the 13th international symposium on Low power electronics and design table of contents
Bangalore, India
Pages 327-328  
Year of Publication: 2008
ISBN:978-1-60558-109-5
Author
Janick Bergeron  Synopsys, Inc., Mountain View, CA, USA
Sponsors
ACM: Association for Computing Machinery
SIGDA: ACM Special Interest Group on Design Automation
Publisher
ACM  New York, NY, USA
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ABSTRACT

Low Power design has traditionally been the area of Implementation engineers. However, with more and more advanced SOCs having to adopt aggressive Power Management techniques, the verification of these architectures has become an explosive problem. This talk will focus on the basic technology shifts required in the arena of verification - in dynanamic, static and formal analysis, in the area of Verification Methodology, Languages and Protocols and in next generation automation flows. The talk will also highlight some of the unsolved problems of today's technology and potential areas for research/collaboration between academia and industry.