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Power gating scheduling for power/ground noise reduction
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 45th annual Design Automation Conference table of contents
Anaheim, California
SESSION: Noise reliability enhancement table of contents
Pages: 980-985  
Year of Publication: 2008
ISBN ~ ISSN:0738-100X , 978-1-60558-115-6
Authors
Hailin Jiang  University of California, Santa Barbara, CA
Malgorzata Marek-Sadowska  University of California, Santa Barbara, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: IEEE/CASS/CANDE/CEDA
: The EDA Consortium
Publisher
ACM  New York, NY, USA
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ABSTRACT

Power gating is a technique for efficiently reducing leakage power by disconnecting idle blocks from the power grid. When gated blocks are woken up, large amounts of switching currents are drawn in a short period of time that may introduce severe noise on the power delivery mesh. In this paper, we propose a GA-based approach to schedule power gating considering power/ground noise. We introduce a simulation-based method to accurately and efficiently estimate the worst case noise, taking all the current sources, inductance and decaps' effects into consideration. We also present an incremental scheduling procedure considering the dynamic changes of decap configuration. Experimental results show that by optimally scheduling the wake-up order under time constraints, our technique can reduce noise up to 50% compared to waking gated blocks simultaneously. The quality of results depends upon the total wake-up time constraint, locations of gated blocks, current densities of gated blocks, and decap distribution.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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S. Henzler and M. Eireiner, "Activation technique for sleep-transistor circuits for reduced power supply noise," in Proc. European Solid-State Circuits Conference, 2006, pp. 102--105.
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A. Ramalingam, A. Devgan, and D. Z. Pan, "Walk-up scheduling in MTCOMS circuits using successive relaxation to minimize ground bounce", J. of Low Power Electronics, Vol. 3, No.1, pp. 1--8, 2007.
 
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MCNC Benchmarks. {online}. Available: http://www.cbl.ncsu.edu/pub/Benchmark_divs/

Collaborative Colleagues:
Hailin Jiang: colleagues
Malgorzata Marek-Sadowska: colleagues