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Many-core design from a thermal perspective
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 45th annual Design Automation Conference table of contents
Anaheim, California
SESSION: Power and thermal considerations in single- and multi-core systems table of contents
Pages 746-749  
Year of Publication: 2008
ISBN ~ ISSN:0738-100X , 978-1-60558-115-6
Authors
Wei Huang  University of Virginia, Charlottesville, VA
Mircea R. Stant  University of Virginia, Charlottesville, VA
Karthik Sankaranarayanan  University of Virginia, Charlottesville, VA
Robert J. Ribando  University of Virginia, Charlottesville, VA
Kevin Skadron  University of Virginia, Charlottesville, VA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: IEEE/CASS/CANDE/CEDA
: The EDA Consortium
Publisher
ACM  New York, NY, USA
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ABSTRACT

Air cooling limits have been a major design challenge in recent years for integrated circuits. Multi-core exacerbates thermal challenges because power scales with the number of cores, but also creates new opportunities for temperature-aware design, because multi-core designs offer more design parameters than single-core designs. This paper investigates the relationship between core size and on-chip hot spot temperature and shows that with the same power density, smaller cores are cooler than larger cores due to a spatial low-pass filtering effect of temperature. This phenomenon suggests that designs exploiting low-pass filtering can dissipate more power within the same cooling budget than contemporary designs.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
The International Technology Roadmap for Semiconductors (ITRS), 2005.
 
2
K. Sankaranarayanan et al. A Case for Thermal-Aware Floorplanning at the Microarchitectural Level. The Journal of ILP, vol. 7, October 2005.
 
3
W. Huang et al. An Improved HotSpot Block-Based Thermal Model with Granularity considerations. WDDD Workshop, in conjunction with ISCA, June 2007.
 
4
K. Etessam-Yazdani et al. Impact of Power Granularity on Chip Thermal Modeling. ITHERM, June 2006.
 
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Y. Han et al. Temperature-aware floorplanning. TACS Workshop in conj. with ISCA, 2005.
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W. Huang et al. Many-Core Design from a Thermal Perspective: Extended Analysis and Results. Technical Report CS-2008-05, University of Virginia, Computer Science Department, April 2008.

Collaborative Colleagues:
Wei Huang: colleagues
Mircea R. Stant: colleagues
Karthik Sankaranarayanan: colleagues
Robert J. Ribando: colleagues
Kevin Skadron: colleagues