| Techniques for fully integrated intra-/inter-chip optical communication |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 45th annual Design Automation Conference
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Anaheim, California
SESSION: Special session: wild and crazy ideas
table of contents
Pages: 343-344
Year of Publication: 2008
ISBN ~ ISSN:0738-100X , 978-1-60558-115-6
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Downloads (6 Weeks): 4, Downloads (12 Months): 51, Citation Count: 1
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ABSTRACT
In this paper we propose to replace all data and control pads generally present in conventional chips with a new type of ultra-compact, low-power optical interconnect implemented almost entirely in CMOS. The proposed scheme enables optical through-chip buses that could service hundreds of thinned stacked dies. High throughputs and communication density could be achieved even in tight power budgets. The core of the optical interconnect is a single-photon avalanche diode operating in pulse position modulation. We demonstrate how throughputs of several gigabits per second may be achieved. We also show a systematic analysis of the system and preliminary results to support its suitability in emerging DSM technologies.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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H. Zhang, E. Gu, C. Jeon, Z. Gong, M. Dawson, M. Neil, and P. French, "Microstripe-array in GaN Light-emitting Diodes with Individually Addressable Elements," IEEE Photonics Technology Letters, Vol. 18, N. 8, pp. 1681--1683, 2007.
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