Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement

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Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement

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Annual ACM IEEE Design Automation Conference archive
Proceedings of the 45th annual Design Automation Conference table of contents

Anaheim, California

SESSION: Emerging nano/biotechnologies table of contents

Pages 278-283

Year of Publication: 2008

ISBN ~ ISSN:0738-100X , 978-1-60558-115-6

Authors

Jing Li	Purdue University, West Lafayette, IN
Charles Augustine	Purdue University, West Lafayette, IN
Sayeef Salahuddin	Purdue University, West Lafayette, IN
Kaushik Roy	Purdue University, West Lafayette, IN

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
: IEEE/CASS/CANDE/CEDA
: The EDA Consortium

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ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 17, Downloads (12 Months): 80, Citation Count: 2

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ABSTRACT

Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRAM, DRAM and flash memories. It also solves the key drawbacks of conventional MRAM technology: poor scalability and high write current. In this paper, we analyzed and modeled the failure probabilities of STT MRAM cells due to parameter variations. Based on the model, we developed an efficient simulation tool to capture the coupled electro/magnetic dynamics of spintronic device, leading to effective prediction for memory yield. We also developed a statistical optimization methodology to minimize the memory failure probability. The proposed methodology can be used at an early stage of the design cycle to enhance memory yield.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	A. D. Smith et al. STT-RAM --A New Spin on Universal Memory, Future Fab Intl. Vol. 23, July 2007
	2	S. Tehrani et al., Magnetoresistive Random Access Memory Using Magnetic Tunnel Junctions, Proceeding of The IEEE, Vol. 91, No. 5, May 2003
	3	E. Y. Chen et al., Comparison of oxidation methods for magnetic tunnel junction material, J. Appl. Phys., vol. 87, pp. 6061--6063, 2000.
	4	S. Mukhopadhyay et al., Modeling of Failure Probability and Statistical Design of SRAM Array for Yield Enhancement in Nanoscaled CMOS, TCAD, pp 1859--1880, Dec. 2005.
	5	M. Hosomi et al., A Novel Nonvolatile Memory with Spin Torque Transfer Magnetization Switching: Spin-RAM, IEDM Tech. Dig., pp. 473--476, Dec., 2006.
	6	S. Salahuddin et al., Quantum Transport Simulation of Tunneling Based Spin Torque Transfer (STT) Devices: Design Trade offs and Torque Efficiency, IEDM Tech. Dig., pp. 121--124, Dec., 2007.
	7	A. R. Alvarez et al., Application of statistical design and response surface methods to computer-aided VLSI device design, TCAD, pp. 272--288, Feb. 1988.
	8	BPTM 130nm: Berkeley Predictive technology model.

CITED BY 2

	Jing Li , Patrick Ndai , Ashish Goel , Haixin Liu , Kaushik Roy, An alternate design paradigm for robust spin-torque transfer magnetic RAM (STT MRAM) from circuit/architecture perspective, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan
	Charles Augustine , Behtash Behin-Aein , Xuanyao Fong , Kaushik Roy, A design methodology and device/circuit/architecture compatible simulation framework for low-power magnetic quantum cellular automata systems, Proceedings of the 2009 Conference on Asia and South Pacific Design Automation, January 19-22, 2009, Yokohama, Japan