| Vision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor |
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Annual ACM IEEE Design Automation Conference
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Proceedings of the 45th annual Design Automation Conference
table of contents
Anaheim, California
SESSION: Special session: student design contest
table of contents
Pages 96-101
Year of Publication: 2008
ISBN ~ ISSN:0738-100X , 978-1-60558-115-6
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Authors
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Donghyun Kim
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KAIST, Gu-Seong Dong, Yu-Seong Gu, Daejeon, Korea
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Kwanho Kim
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KAIST, Gu-Seong Dong, Yu-Seong Gu, Daejeon, Korea
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Joo-Young Kim
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KAIST, Gu-Seong Dong, Yu-Seong Gu, Daejeon, Korea
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Seungjin Lee
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KAIST, Gu-Seong Dong, Yu-Seong Gu, Daejeon, Korea
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Hoi-Jun Yoo
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KAIST, Gu-Seong Dong, Yu-Seong Gu, Daejeon, Korea
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Downloads (6 Weeks): 15, Downloads (12 Months): 81, Citation Count: 0
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ABSTRACT
To enable power-efficient object recognition of mobile intelligent robots, 81.6GOPS object recognition processor is proposed. Based on analysis of Scale Invariant Feature Transform (SIFT) algorithm, architecture of the proposed processor is designed to support both task and data level parallelism. 10 Processing Elements (PEs) are integrated for task parallelism, and each PE is equipped with SIMD instruction for data parallelism as well. In addition, Visual Image Processing memory replaces complex local maximum pixel search operation with a single read operation for further performance gain. With the proposed processor, we also realized vision platform for real-time SIFT computation of mobile robots. The chip operation is tested up to 200MHz and consumes 540mW in the vision platform at 1.8V supply voltage and 100 MHz operation frequency.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Donghyun Kim, et al., "An 81.6 GOPS Object Recognition Processor Based on NoC and Visual Image Processing Memory," Proceedings of the IEEE Custom Integrated Circuits Conference, pp.443--446, Sep., 2007.
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Joo-Young Kim and Hoi-Jun Yoo, "Bitwise Competition Logic for Compact Digital Comparator," Proceedings of the IEEE Asian Solid States Circuits Conference, pp.59--62, Nov., 2007.
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Joo-Young Kim, Donghyun Kim, et al., "Visual Image Processing RAM for Fast 2-D Data Location Search," Proceedings of the IEEE European Solid-State Circuits Conference, pp.324--327, Sep., 2007.
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Shorin Kyo, et. al., "A 51.2 GOPS Scalable Video Recognition Processor for Intelligent Cruise Control Based on a Linear Array of 128 4-Way VLIW Processing Elements," Digest of Technical Papers, IEEE Intl. Solid-State Circuits Conf, Vol. 1, pp. 48--477, 2003.
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Wolfgang Raab , Nico Bruels , Ulrich Hachmann , Jens Harnisch , Ulrich Ramacher , Christian Sauer , Axel Techmer, A 100-GOPS Programmable Processor for Vehicle Vision Systems, IEEE Design & Test, v.20 n.1, p.8-16, January 2003
[doi> 10.1109/MDT.2003.1173047]
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Jun Tanabe, et. al., "Visconti: Multi-VLIW Image Recognition Processor based on Configurable Processor," Proceedings of the IEEE Custom Integrated Circuits Conf., pp. 185--188, 2003.
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