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Sparse matrix computations on manycore GPU's
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Source Annual ACM IEEE Design Automation Conference archive
Proceedings of the 45th annual Design Automation Conference table of contents
Anaheim, California
SESSION: Special session: enabling concurrency in EDA table of contents
Pages 2-6  
Year of Publication: 2008
ISBN ~ ISSN:0738-100X , 978-1-60558-115-6
Author
Michael Garland  NVIDIA Corporation, Santa Clara, CA
Sponsors
SIGDA: ACM Special Interest Group on Design Automation
: IEEE/CASS/CANDE/CEDA
: The EDA Consortium
Publisher
ACM  New York, NY, USA
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ABSTRACT

Modern microprocessors are becoming increasingly parallel devices, and GPUs are at the leading edge of this trend. Designing parallel algorithms for manycore chips like the GPU can present interesting challenges, particularly for computations on sparse data structures. One particularly common example is the collection of sparse matrix solvers and combinatorial graph algorithms that form the core of many physical simulation techniques. Although seemingly irregular, these operations can often be implemented with data parallel operations that map very well to massively parallel processors.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
P. Alliez, G. Ucelli, C. Gotsman, and M. Attene. Recent advances in remeshing of surfaces. In L. D. Floriani and M. Spagnulo, editors, Shape Analysis and Structuring, pages 53--82. Springer, 2007.
 
2
A.-L. Barabási and E. Bonabeau. Scale-free networks. Scientific American, 288:60--69, 2003.
 
3
 
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CUDPP: CUDA data parallel primitives library. http://www.gpgpu.org/developer/cudpp/.
 
6
G. H. Golub and C. F. V. Loan. Matrix Computations. Johns Hopkins Univ. Press, Baltimore, Third edition, 1996.
7
 
8
 
9
M. E. J. Newman. The structure and function of complex networks. In SIAM Review, volume 45, pages 167--256, 2003.
10
 
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NVIDIA Corporation. NVIDIA CUDA Programming Guide, Nov. 2007. Version 1.1.
 
12
 
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J. A. Stratton, S. S. Stone, and W. W. Hwu. M-CUDA: An efficient implementation of CUDA kernels on multi-cores. IMPACT Technical Report IMPACT-08-01, UIUC, Feb. 2008.
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