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Ased: availability, security, and debugging support usingtransactional memory

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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures table of contents

Munich, Germany

POSTER SESSION: Posters table of contents

Pages 366-366

Year of Publication: 2008

ISBN:978-1-59593-973-9

Authors

JaeWoong Chung	Stanford University, Stanford, CA, USA
Woongki Baek	Stanford University, Stanford, CA, USA
Nathan Grasso Bronson	Stanford University, Stanford, CA, USA
Jiwon Seo	Stanford University, Stanford, CA, USA
Christos Kozyrakis	Stanford University, Stanford, CA, USA
Kunle Olukotun	Stanford University, Stanford, CA, USA

Sponsors

ACM: Association for Computing Machinery
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture

Publisher

ACM New York, NY, USA

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ABSTRACT

We propose ASeD that uses the hardware resources of transactional memory systems for non transactional memory purpose. We show that the hardware components for register checkpointing, data versioning, and conflict detection can be reused as basic building blocks for reliability, security, and debugging support.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	Lance Hammond , Vicky Wong , Mike Chen , Brian D. Carlstrom , John D. Davis , Ben Hertzberg , Manohar K. Prabhu , Honggo Wijaya , Christos Kozyrakis , Kunle Olukotun, Transactional Memory Coherence and Consistency, Proceedings of the 31st annual international symposium on Computer architecture, p.102, June 19-23, 2004, München, Germany
	2	K. E. Moore, J. Bobba, et al. LogTM: Log-Based Transactional Memory.In the Proc.of the 12th Intl. Conf.on High-Performance Computer Architecture, Feb. 2006.