| Improving software concurrency with hardware-assisted memory snapshot |
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ACM Symposium on Parallel Algorithms and Architectures
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Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
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Munich, Germany
POSTER SESSION: Posters
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Pages 363-363
Year of Publication: 2008
ISBN:978-1-59593-973-9
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Authors
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JaeWoong Chung
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Stanford University, Stanford, CA, USA
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Jiwon Seo
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Stanford University, Stanford, CA, USA
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Woongki Baek
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Stanford University, Stanford, CA, USA
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Chi CaoMinh
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Stanford University, Stanford, CA, USA
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Austen McDonald
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Stanford University, Stanford, CA, USA
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Christos Kozyrakis
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Stanford University, Stanford, CA, USA
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Kunle Olukotun
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Stanford University, Stanford, CA, USA
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Downloads (6 Weeks): 4, Downloads (12 Months): 34, Citation Count: 0
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ABSTRACT
We propose a hardware-assisted memory snapshot to improve software concurrency. It is built on top of the hardware resources for transactional memory and allows for easy development of system software modules such as concurrent garbage collector and dynamic profiler.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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Lance Hammond , Vicky Wong , Mike Chen , Brian D. Carlstrom , John D. Davis , Ben Hertzberg , Manohar K. Prabhu , Honggo Wijaya , Christos Kozyrakis , Kunle Olukotun, Transactional Memory Coherence and Consistency, Proceedings of the 31st annual international symposium on Computer architecture, p.102, June 19-23, 2004, München, Germany
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