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Irrevocable transactions and their applications
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ACM Symposium on Parallel Algorithms and Architectures archive
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures table of contents
Munich, Germany
SESSION: Special track -- STM design and locks table of contents
Pages 285-296  
Year of Publication: 2008
ISBN:978-1-59593-973-9
Authors
Adam Welc  Intel Corporation, Santa Clara, CA, USA
Bratin Saha  Intel Corporation, Santa Clara, CA, USA
Ali-Reza Adl-Tabatabai  Intel Corporation, Santa Clara, CA, USA
Sponsors
ACM: Association for Computing Machinery
SIGACT: ACM Special Interest Group on Algorithms and Computation Theory
SIGARCH: ACM Special Interest Group on Computer Architecture
Publisher
ACM  New York, NY, USA
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Downloads (6 Weeks): 7,   Downloads (12 Months): 124,   Citation Count: 7
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ABSTRACT

Transactional memory (TM) provides a safer, more modular, and more scalable alternative to traditional lock-based synchronization. Implementing high performance TM systems has recently been an active area of research. However, current TM systems provide limited, if any, support for transactions executing irrevocable actions, such as I/O and system calls, whose side effects cannot in general be rolled back. This severely limits the ability of these systems to run commercial workloads.

This paper describes the design of a transactional memory system that allows irrevocable actions to be executed inside of transactions. While one transaction is executing an irrevocable action, other transactions can still execute and commit concurrently. We use a novel mechanism called single-owner read locks to implement irrevocable actions inside transactions that maximizes concurrency and avoids overhead when the mechanism is not used. We also show how irrevocable transactions can be leveraged for contention management to handle actions whose effects may be expensive to roll back. Finally, we present a thorough performance evaluation of the irrevocability mechanism for the different usage models.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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C. Blundell, E. C. Lewis, and M. Martin. Unrestricted transactional memory: Supporting i/o and system calls within transactions. Technical Report CIS--06--09, University of Pennsylvania, Department of Comp. and Info. Science, 2006.
 
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M. Spear, M. Michael, and M. Scott. Inevitability mechanisms for software transactional memory. In TRANSACT 2008.
 
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Standard Performance Evaluation Corporation (SPEC). SPECjbb2000 benchmarks, 2000. http://www.spec.org/jbb2000.
 
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A. Welc, A. L. Hosking, and S. Jagannathan. Transparently reconciling transactions with locking for Java synchronization. In ECOOP 2006.

CITED BY  7

Collaborative Colleagues:
Adam Welc: colleagues
Bratin Saha: colleagues
Ali-Reza Adl-Tabatabai: colleagues