| RaceTM: detecting data races using transactional memory |
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ACM Symposium on Parallel Algorithms and Architectures
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Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
table of contents
Munich, Germany
SESSION: Brief announcements
table of contents
Pages 104-106
Year of Publication: 2008
ISBN:978-1-59593-973-9
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Authors
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Shantanu Gupta
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University of Michigan, Ann Arbor, MI, USA
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Florin Sultan
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NEC Laboratories America, Princeton, NJ, USA
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Srihari Cadambi
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NEC Laboratories America, Princeton, NJ, USA
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Franjo Ivancic
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NEC Laboratories America, Princeton, NJ, USA
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Martin Roetteler
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NEC Laboratories America, Princeton, NJ, USA
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Downloads (6 Weeks): 7, Downloads (12 Months): 81, Citation Count: 0
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ABSTRACT
Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to more hardware concurrency. Dependable multithreaded software will have to rely on the ability to dynamically detect data races, which are non-deterministic and notoriously hard to reproduce symptoms of synchronization bugs. In this paper, we propose RaceTM, a novel approach that exploits transactional memory support to detect data races. We introduce the concept of lightweight debug transactions that exploit the conflict detection mechanisms of transactional memory systems to perform data race detection. Debug transactions differ from regular transactions in that they do not need to be rolled back, and therefore require no versioning or checkpointing support. Debug transactions do not overlap with a regular transaction, thus providing a transparent mechanism to leverage existing transactional memory support for data race detection.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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