| Parallelizing dynamic information flow tracking |
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ACM Symposium on Parallel Algorithms and Architectures
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Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
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Munich, Germany
SESSION: Special track: multicores
table of contents
Pages 35-45
Year of Publication: 2008
ISBN:978-1-59593-973-9
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Authors
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Olatunji Ruwase
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Carnegie Mellon University, Pittsburgh, PA, USA
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Phillip B. Gibbons
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Intel Research Pittsburgh, Pittsburgh, PA, USA
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Todd C. Mowry
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Carnegie Mellon University and Intel Research Pittsburgh, Pittsburgh, PA, USA
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Vijaya Ramachandran
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University of Texas at Austin, Austin, TX, USA
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Shimin Chen
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Intel Research Pittsburgh, Pittsburgh, PA, USA
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Michael Kozuch
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Intel Research Pittsburgh, Pittsburgh, PA, USA
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Michael Ryan
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Intel Research Pittsburgh, Pittsburgh, PA, USA
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Downloads (6 Weeks): 7, Downloads (12 Months): 115, Citation Count: 1
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ABSTRACT
Dynamic information flow tracking (DIFT) is an important tool for detecting common security attacks and memory bugs. A DIFT tool tracks the flow of information through a monitored program's registers and memory locations as the program executes, detecting and containing/fixing problems on-the-fly. Unfortunately, sequential DIFT tools are quite slow, and DIFT is quite challenging to parallelize. In this paper, we present a new approach to parallelizing DIFT-like functionality. Extending our recent work on accelerating sequential DIFT, we consider a variant of DIFT that tracks the information flow only through unary operations relaxed DIFT, and yet makes sense for detecting security attacks and memory bugs. We present a parallel algorithm for relaxed DIFT, based on symbolic inheritance tracking, which achieves linear speed-up asymptotically. Moreover, we describe techniques for reducing the constant factors, so that speed-ups can be obtained even with just a few processors. We implemented the algorithm in the context of a Log-Based Architectures (LBA) system, which provides hardware support for logging a program trace and delivering it to other (monitoring) processors. Our simulation results on SPEC benchmarks and a video player show that our parallel relaxed DIFT reduces the overhead to as low as 1.2X using 9 monitoring cores on a 16-core chip multiprocessor.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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