| Impact of JVM superoperators on energy consumption in resource-constrained embedded systems |
| Full text |
Pdf
(376 KB)
|
Source
|
Language, Compiler and Tool Support for Embedded Systems
archive
Proceedings of the 2008 ACM SIGPLAN-SIGBED conference on Languages, compilers, and tools for embedded systems
table of contents
Tucson, AZ, USA
Pages 23-30
Year of Publication: 2008
ISBN:978-1-60558-104-0
Also published in ...
|
|
Authors
|
|
Carmen Badea
|
University of California, Irvine, Irvine, CA, USA
|
|
Alexandru Nicolau
|
University of California, Irvine, Irvine, CA, USA
|
|
Alexander V. Veidenbaum
|
University of California, Irvine, Irvine, CA, USA
|
|
| Sponsors |
|
| Publisher |
|
| Bibliometrics |
Downloads (6 Weeks): 8, Downloads (12 Months): 98, Citation Count: 0
|
|
|
ABSTRACT
Energy consumption is one of the most important issues in resource-constrained embedded systems. Many such systems run Java-based applications due to Java's architecture-independent format (bytecode). Standard techniques for executing bytecode programs, e.g. interpretation or just-in-time compilation, have performance or memory issues that make them unsuitable for resource-constrained embedded systems. A superoperator-extended, lightweight Java Virtual Machine (JVM) can be used in resource-constrained embedded systems to improve performance and reduce memory consumption. This paper shows that such a JVM also significantly reduces energy consumption. This is due primarily to a considerable reduction in the number of memory accesses and thus in energy consumption in the instruction and data TLBs and caches and, in most cases, in DRAM energy consumption. Since the fraction of processor energy dissipated in these units is approximately 60%, the energy savings achieved are significant. The paper evaluates the number of load, store, and computational instructions eliminated by the use of proposed superoperators as compared to a simple interpreter on a set of embedded benchmarks. Using cache and DRAM per access energy we estimate the total processor/DRAM energy saved by using our JVM. Our results show that with 32KB caches the reduction in energy consumption ranges from 40% to 60% of the overall processor, plus DRAM energy. Even higher savings may be achieved with smaller caches and increased access to DRAM as DRAM access energy is fairly high.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
| |
1
|
|
| |
2
|
|
| |
3
|
David S. Hardin. aJile Systems: Low-Power Direct-Execution Java Microprocessors for Real-Time and Networked Embedded Applications. White paper. Available at www.ajile.com/downloads/aJilewhite-paper.pdf as of Aug. 2007.
|
| |
4
|
V. Tiwari, S. Malik, and A. Wolfe. Compilation techniques for low energy: An overview. In Proc. of Symp. Low-Power Electronics, 1994.
|
| |
5
|
|
 |
6
|
Carmen Badea , Alexandru Nicolau , Alexander V. Veidenbaum, A simplified java bytecode compilation system for resource-constrained embedded processors, Proceedings of the 2007 international conference on Compilers, architecture, and synthesis for embedded systems, September 30-October 03, 2007, Salzburg, Austria
[doi> 10.1145/1289881.1289920]
|
| |
7
|
Jikes Research Virtual Machine. http://jikesrvm.sourceforge.net/.
|
| |
8
|
James Montanaro , Richard T. Witek , Krishna Anne , Andrew J. Black , Elizabeth M. Cooper , Daniel W. Dobberpuhl , Paul M. Donahue , Jim Eno , Gregory W. Hoeppner , David Kruckemyer , Thomas H. Lee , Peter C. M. Lin , Liam Madden , Daniel Murray , Mark H. Pearce , Sribalan Santhanam , Kathryn J. Snyder , Ray Stephany , Stephen C. Thierauf, A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor, Digital Technical Journal, v.9 n.1, p.49-62, 1997
|
| |
9
|
Sebastien Lafond and Johan Lilius. An energy consumption model for java virtual machine. In TR597. TUCS, Finland, 2004.
|
| |
10
|
N. Vijaykrishnan , M. Kandemir , S. Kim , S. Tomar , A. Sivasubramaniam , M. J. Irwin, Energy behavior of java applications from the memory perspective, Proceedings of the 2001 Symposium on JavaTM Virtual Machine Research and Technology Symposium, p.23-23, April 23-24, 2001, Monterey, California
|
| |
11
|
|
 |
12
|
N. Vijaykrishnan , M. Kandemir , M. J. Irwin , H. S. Kim , W. Ye, Energy-driven integrated hardware-software optimizations using SimplePower, Proceedings of the 27th annual international symposium on Computer architecture, p.95-106, June 2000, Vancouver, British Columbia, Canada
|
| |
13
|
|
| |
14
|
G. Sinevriotis and Th. Stouraitis. Power analysis of the arm 7 embedded microprocessor. In Proc. of the 9th Inter. Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS?99), pages 261--270. IEEE, 1999.
|
 |
15
|
Phillip Stanley-Marbell , Michael Hsiao, Fast, flexible, cycle-accurate energy estimation, Proceedings of the 2001 international symposium on Low power electronics and design, p.141-146, August 2001, Huntington Beach, California, United States
[doi> 10.1145/383082.383120]
|
 |
16
|
Kathleen Baynes , Chris Collins , Eric Fiterman , Brinda Ganesh , Paul Kohout , Christine Smit , Tiebing Zhang , Bruce Jacob, The performance and energy consumption of three embedded real-time operating systems, Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, November 16-17, 2001, Atlanta, Georgia, USA
[doi> 10.1145/502217.502253]
|
 |
17
|
Vivek Tiwari , Mike Tien-Chien Lee, Power analysis of a 32-bit embedded microcontroller, Proceedings of the 1995 conference on Asia Pacific design automation (CD-ROM), p.23-es, August 29-September 01, 1995, Makuhari, Massa, Chiba, Japan
[doi> 10.1145/224818.224890]
|
 |
18
|
Mike Tien-Chien Lee , Vivek Tiwari , Sharad Malik , Masahiro Fujita, Power analysis and low-power scheduling techniques for embedded DSP software, Proceedings of the 8th international symposium on System synthesis, p.110-115, September 13-15, 1995, Cannes, France
[doi> 10.1145/224486.224525]
|
| |
19
|
CACTI 4.2. http://quid.hpl.hp.com:9081/cacti/.
|
| |
20
|
Jelena Trajkovic and Alexander Veidenbaum. Reducing SDRAM Energy Consumption in Embedded Systems. Technical Report TR04-02, University of California, Irvine, 2004.
|
| |
21
|
Standard Performance Evaluation Corporation. www.spec.org.
|
| |
22
|
PNG Software. http://www.sixlegs.com/software/png/.
|
| |
23
|
The Legion of the Bouncy Castle. http://www.bouncycastle.org/.
|
| |
24
|
ej TECHNOLOGIES. Jprofiler. http://www.ej-technologies.com/products/jprofiler/overview.html.
|
 |
25
|
|
| |
26
|
Ana Lucia Velloso Azevedo. Annotation-aware dynamic compilation and interpretation. PhD thesis, 2002. Chair-Alexandru Nicolau.
|
 |
27
|
Ben Stephenson , Wade Holst, Advancements in multicode optimization, Companion to the 19th annual ACM SIGPLAN conference on Object-oriented programming systems, languages, and applications, October 24-28, 2004, Vancouver, BC, CANADA
[doi> 10.1145/1028664.1028742]
|
| |
28
|
Diarmuid O?Donoghue and James F. Power. Identifying and evaluating a generic set of superinstructions for embedded java programs. In ESA/VLSI, pages 192--198, 2004.
|
| |
29
|
Kevin Casey, David Gregg, M. Anton Ertl, and Andrew Nisbet. Towards superinstructions for java interpreters. In SCOPES, pages 329--343, 2003.
|
|