Software thermal management of dram memory for multicore systems

ABSTRACT

Thermal management of DRAM memory has become a critical issue for server systems. We have done, to our best knowledge, the first study of software thermal management for memory subsystem on real machines. Two recently proposed DTM (Dynamic Thermal Management) policies have been improved and implemented in Linux OS and evaluated on two multicore servers, a Dell PowerEdge 1950 server and a customized Intel SR1500AL server testbed. The experimental results first confirm that a system-level memory DTM policy may significantly improve system performance and power efficiency, compared with existing memory bandwidth throttling scheme. A policy called DTM-ACG (Adaptive Core Gating) shows performance improvement comparable to that reported previously. The average performance improvements are 13.3% and 7.2% on the PowerEdge 1950 and the SR1500AL (vs. 16.3% from the previous simulation-based study), respectively. We also have surprising findings that reveal the weakness of the previous study: the CPU heat dissipation and its impact on DRAM memories, which were ignored, are significant factors. We have observed that the second policy, called DTM-CDVFS (Coordinated Dynamic Voltage and Frequency Scaling), has much better performance than previously reported for this reason. The average improvements are 10.8% and 15.3% on the two machines (vs. 3.4% from the previous study), respectively. It also significantly reduces the processor power by 15.5% and energy by 22.7% on average.

REFERENCES

• 1: David Brooks , Margaret Martonosi, Dynamic Thermal Management for High-Performance Microprocessors, Proceedings of the 7th International Symposium on High-Performance Computer Architecture, p.171, January 20-24, 2001
• 2: Jeonghwan Choi , Youngjae Kim , Anand Sivasubramaniam , Jelena Srebric , Qian Wang , Joonwon Lee, Modeling and Managing Thermal Profiles of Rack-mounted Servers with ThermoStat, Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture, p.205-215, February 10-14, 2007 [doi>10.1109/HPCA.2007.346198]
• 3: James Donald , Margaret Martonosi, Techniques for Multicore Thermal Management: Classification and New Exploration, Proceedings of the 33rd annual international symposium on Computer Architecture, p.78-88, June 17-21, 2006
• 4: Brinda Ganesh , Aamer Jaleel , David Wang , Bruce Jacob, Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling, Proceedings of the 2007 IEEE 13th International Symposium on High Performance Computer Architecture, p.109-120, February 10-14, 2007 [doi>10.1109/HPCA.2007.346190]
• 5: Sudhanva Gurumurthi , Anand Sivasubramaniam , Vivek K. Natarajan, Disk Drive Roadmap from the Thermal Perspective: A Case for Dynamic Thermal Management, Proceedings of the 32nd annual international symposium on Computer Architecture, p.38-49, June 04-08, 2005
• 6: Taliver Heath , Ana Paula Centeno , Pradeep George , Luiz Ramos , Yogesh Jaluria , Ricardo Bianchini, Mercury and freon: temperature emulation and management for server systems, Proceedings of the 12th international conference on Architectural support for programming languages and operating systems, October 21-25, 2006, San Jose, California, USA
• 7: Hewlett-Packed Development Company. Perfmon project. http://www.hpl.hp.com/research/linux/perfmon.
• 8: Intel Corp. Dual-core Intel® Xeon® processor 5000 series. ftp://download.intel.com/design/Xeon/datashts/31307901.pdf, 2006.
• 9: Intel Corp. Intel® fully buffered DIMM specification addendum. http://www.intel.com/technology/memory/FBDIMM/spec/Intel_FBD_Spec_Addendum_rev_p9.pdf, 2006.
• 10: Canturk Isci , Alper Buyuktosunoglu , Chen-Yong Cher , Pradip Bose , Margaret Martonosi, An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.347-358, December 09-13, 2006 [doi>10.1109/MICRO.2006.8]
• 11: Canturk Isci , Gilberto Contreras , Margaret Martonosi, Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management, Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, p.359-370, December 09-13, 2006 [doi>10.1109/MICRO.2006.30]
• 12: J. Iyer, C. L. Hall, J. Shi, and Y. Huang. System memory power and thermal management in platforms built on Intel® Centrino® Duo mobile technology. Intel Technology Journal, 10, 2006.
• 13: Y. Kim, S. Gurumurthi, and A. Sivasubramaniam. Understanding the performance-temperature interactions in disk I/O of server workloads. In Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006.
• 14: Y. Li, B. Lee, D. Brooks, Z. Hu, and K. Skadron. CMP design space exploration subject to physical constraints. In Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006.
• 15: Jiang Lin , Hongzhong Zheng , Zhichun Zhu , Howard David , Zhao Zhang, Thermal modeling and management of DRAM memory systems, Proceedings of the 34th annual international symposium on Computer architecture, June 09-13, 2007, San Diego, California, USA
• 16: K. Man. Bensley FB-DIMM performance/thermal management, 2006. Intel Developer Forum.
• 17: Micron Technology, Inc. DDR2 SDRAM system-power calculator. http://www.micron.com/support/designsupport/tools/powercalc/powercalc.
• 18: J. Moore, J. Chase, P. Ranganathan, and R. Sharma. Temperature-aware resource assignment in data centers. In Proceedings of USENIX, 2005.
• 19: Kevin Skadron , Tarek Abdelzaher , Mircea R. Stan, Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management, Proceedings of the 8th International Symposium on High-Performance Computer Architecture, p.17, February 02-06, 2002
• 20: Kevin Skadron , Mircea R. Stan , Wei Huang , Sivakumar Velusamy , Karthik Sankaranarayanan , David Tarjan, Temperature-aware microarchitecture, Proceedings of the 30th annual international symposium on Computer architecture, June 09-11, 2003, San Diego, California

INDEX TERMS

Primary Classification:
  B. Hardware
  B.3 MEMORY STRUCTURES
      B.3.2 Design Styles
          Subjects: Primary memory

General Terms:
Design, Management, Performance

Keywords:
DRAM memories, thermal management