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Optimization strategies for a java virtual machine interpreter on the cell broadband engine
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Conference On Computing Frontiers archive
Proceedings of the 5th conference on Computing frontiers table of contents
Ischia, Italy
SESSION: Compilation table of contents
Pages 189-198  
Year of Publication: 2008
ISBN:978-1-60558-077-7
Authors
Kevin Williams  Trinity College Dublin, Dublin, Ireland
Albert Noll  ETH Zurich, Zurich, Switzerland
Andreas Gal  University of California, Irvine, Irvine, CA, USA
David Gregg  Trinity College Dublin, Dublin, Ireland
Sponsors
ACM: Association for Computing Machinery
SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing
Publisher
ACM  New York, NY, USA
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ABSTRACT

Virtual machines (VMs) such as the Java VM are a popular format for running architecture-neutral code in a managed runtime. Such VMs are typically implemented using a combination of interpretation and just-in-time compilation (JIT). A significant challenge for the portability of VM code is the growing popularity of multi-core architectures with specialized processing cores aimed at computation-intensive applications such as media processing. Such cores differ greatly in architectural design compared to traditional desktop processors. One such processing core is the Cell Broadband Engine's (Cell BE) Synergistic Processing Element (SPE). An SPE is a light weight VLIW processor core with a SIMD vector instruction set. In this paper we investigate some popular interpreter optimizations and introduce new optimizations exploiting the special hardware properties offered by the Cell BE's SPE


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

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B. Brock and M. Exerman. Cache Latencies of the PowerPC MPC7451. Freescale Semiconductor Application Note, AN2180, 2006
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IBM. Cell Broadband Engine Programming Handbook, 4 2007.
 
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A. Noll, A. Gal, and M. Franz. CellVM: A Homogeneous Virtual Machine Runtime System for a Heterogeneous Single-Chip Multiprocessor, 2006.
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Collaborative Colleagues:
Kevin Williams: colleagues
Albert Noll: colleagues
Andreas Gal: colleagues
David Gregg: colleagues