| An analytical model for the upper bound on temperature differences on a chip |
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Great Lakes Symposium on VLSI
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Proceedings of the 18th ACM Great Lakes symposium on VLSI
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Orlando, Florida, USA
SESSION: Session 6A: Low Power Architecture
table of contents
Pages 417-422
Year of Publication: 2008
ISBN:978-1-59593-999-9
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Downloads (6 Weeks): 9, Downloads (12 Months): 62, Citation Count: 0
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ABSTRACT
The main contribution of this work is an analytical model for finding the upper bound on the temperature difference among various locations on the die. The proposed model can be used in many applications, such as estimation of maximum temperature variations on the die and estimating the maximum placement error in temperature sensor placement algorithms. The model also identifies the conditions under which these maximum temperature variations might happen, which is very helpful for generating test data for thermal stress tests and for augmenting different benchmarks. Experiments show that maximum temperature differences can be underestimated as much as 9°C. Based on this model, a temperature sensor placement algorithm is also proposed which is able to guaranty a maximum temperature error due to placement of the sensor. The ability of the proposed model to estimate point to point maximum temperature difference can improve the efficiency and accuracy of the sensor placement technique so that we can reduce the number of thermal sensors needed by about 16% on average.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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W. Huang, M.R. Stan, K. Skadron, K. Sankaranarayanan, and S. Ghosh. "HotSpot: A Compact Thermal Modeling Method for CMOS VLSI Systems." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14(5):501--513, May 2006.
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2
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M. Pedram, S. Nazarian, "Thermal modeling, analysis, and management in VLSI circuits: Principles and Methods," In Proceedings of IEEE, special issue on Thermal Analysis of ULSI, 2006.
|
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3
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Shekhar Borkar , Tanay Karnik , Siva Narendra , Jim Tschanz , Ali Keshavarzi , Vivek De, Parameter variations and impact on circuits and microarchitecture, Proceedings of the 40th conference on Design automation, June 02-06, 2003, Anaheim, CA, USA
[doi> 10.1145/775832.775920]
|
| |
4
|
C.J. Lasance. Thermally driven reliability issues in microelectronic systems: status quo and challenges. Microelectronics Reliability, 43:1969--1974, 2003.
|
| |
5
|
A.K. Coskun, T. Rosing, K. Mihic, Y. Leblebici and G. De Micheli. "Analysis and Optimization of MPSoC Reliability." In Journal of Low Power Electronics (JOLPE), April 2006.
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6
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7
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A, Naveh, E. Rotem, E.A. Mendelson, S. Gochman, S.R. Chabukswar, K. Krishnan, A. Kumar, "Power and Thermal Management in the Intel® Core" Duo Processor" Intel Technology Journal. May 2006.
|
 |
8
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Wei Huang , Mircea R. Stan , Kevin Skadron , Karthik Sankaranarayanan , Shougata Ghosh , Sivakumar Velusam, Compact thermal modeling for temperature-aware design, Proceedings of the 41st annual conference on Design automation, June 07-11, 2004, San Diego, CA, USA
[doi> 10.1145/996566.996800]
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9
|
|
| |
10
|
HotSpot, http://lava.cs.virginia.edu/HotSpot/
|
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11
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Intel PXA270 processor, electrical, mechanical and thermal specification data sheet. http://www.intel.com.
|
| |
12
|
M. R. Guthaus , J. S. Ringenberg , D. Ernst , T. M. Austin , T. Mudge , R. B. Brown, MiBench: A free, commercially representative embedded benchmark suite, Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop, p.3-14, December 02-02, 2001
[doi> 10.1109/WWC.2001.15]
|
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13
|
MiBench Version 1.0 Webpage, http://www.eecs.umich.edu/mibench/
|
| |
14
|
G. Fursin, J. Cavazos, M. O'Boyle and O. Temam. "MiDataSets: Creating The Conditions For A More Realistic Evaluation of Iterative Optimization." Proceedings of the International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2007), Ghent, Belgium, January 2007
|
| |
15
|
T. Simunic, L. Benini, P. Glynn, G. De Micheli, "Event-Driven Power Management," IEEE Transactions on Computer-Aided Design, July 2001.
|
 |
16
|
|
| |
17
|
|
| |
18
|
S. Mondal, R. Mukherjee, and S.O. Memik. "Fine--Grain Thermal Profiling and Sensor Insertion for FPGAs." Proceedings of IEEE International Symposium on Circuits and Systems 2006.
|
| |
19
|
|
| |
20
|
LP-solve. http://www.geocities.com/lpsolve/
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