| Phase-based cache reconfiguration for a highly-configurable two-level cache hierarchy |
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Great Lakes Symposium on VLSI
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Proceedings of the 18th ACM Great Lakes symposium on VLSI
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Orlando, Florida, USA
POSTER SESSION: Poster session 2
table of contents
Pages 379-382
Year of Publication: 2008
ISBN:978-1-59593-999-9
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Downloads (6 Weeks): 13, Downloads (12 Months): 72, Citation Count: 0
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ABSTRACT
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in an application-based tuning methodology. Prior work and logic suggests phase-based tuning may provide significant savings over application-based tuning. We investigate this hypothesis using a detailed cache model and tune a highly-configurable cache on a per-phase basis compared to tuning once per application, and found phase-based tuning to yield improvements of up to 37% in performance and 20% in energy over application-based tuning. Furthermore, we extend previous phase-based tuning of a configurable cache by significantly increasing configurability and show 14% energy improvement compared to previous methods. In addition, we quantify the overhead imposed due to cache reconfiguration.
REFERENCES
Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.
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