A GF(p) elliptic curve group operator resistant against side channel attacks

ABSTRACT

This paper deals with FPGA and ASIC implementations of side-channel attack resistant elliptic curve cryptosystems defined over GF(p). The elegance of the design lies in the fact that all operations are performed in binary number system, thus reducing conversion overheads of existing architectures. In our implementation, point addition and point doubling operations are performed in affine coordinates. They are performed using same amount of computation, which provides a secure design against timing and power analysis attacks. Implementation and side-channel analysis results are compared with related existing designs.

REFERENCES

• 1: Victor S Miller, Use of elliptic curves in cryptography, Lecture notes in computer sciences; 218 on Advances in cryptology---CRYPTO 85, p.417-426, June 1986, Santa Barbara, California, United States
• 2: N. Koblitz, "Elliptic curve cryptosystems", Mathematics of Computation, Vol. 48, No. 177, pages 203--209, January 1987.
• 3: Ian F. Blake , G. Seroussi , N. P. Smart, Elliptic curves in cryptography, Cambridge University Press, New York, NY, 1999
• 4: Darrel Hankerson , Alfred J. Menezes , Scott Vanstone, Guide to Elliptic Curve Cryptography, Springer-Verlag New York, Inc., Secaucus, NJ, 2003
• 5: F.R. Henriquez, N.A. Saqib, A.D. Perez and C.K. Koc, "Cryptographic Algorithms on Reconfigurable Hardware", Springer, US, 2006.
• 6: S.B. Ors, L. Batina, B. Preneel and J. Vandewalle, "Hardware implementation of elliptic curve processor over GF(p)", ASAP 2003, pages 433--443.
• 7: A. Daly, W. Marnane, T. Kerins and E. Popovici, "An FPGA implementation of a GF(p) ALU for encryption processors", Microprocessors and Microsystems, Vol. 28, pages 253--260, 2004.
• 8: Gerardo Orlando , Christof Paar, A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware, Proceedings of the Third International Workshop on Cryptographic Hardware and Embedded Systems, p.348-363, May 14-16, 2001
• 9: Jean-Sébastien Coron, Resistance against Differential Power Analysis for Elliptic Curve Cryptosystems, Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems, p.292-302, August 12-13, 1999
• 10: NIST, "Recommended elliptic curves for federal government use", July 1999.
• 11: Paul C. Kocher, Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems, Proceedings of the 16th Annual International Cryptology Conference on Advances in Cryptology, p.104-113, August 18-22, 1996
• 12: Paul C. Kocher , Joshua Jaffe , Benjamin Jun, Differential Power Analysis, Proceedings of the 19th Annual International Cryptology Conference on Advances in Cryptology, p.388-397, August 15-19, 1999
• 13: S.B. Ors, E. Oswald and B. Preneel, "Power-Analysis Attacks on an FPGA (First Experimental Results)", CHES 2003, Cologne, Germany, LNCS 2775, pages 37--50, September 2003.
• 14: E. Ozturk, B. Sunar and E. Savas, "Low-Power Elliptic Curve Cryptography Using Scaled Modular Arithmetic", CHES 2004, Cambridge, MA, USA, LNCS 3156, pages 92--106, August 2004.
• 15: W. Shusua and Z. Yuefei, "A Timing and Area Tradeoff GF(p) Elliptic Curve Processor Architecture for FPGA", ICCCAS 2005, pages 1308--1312, June 2005.
• 16: L. Batina, N. Mentens, B. Preneel and I. Verbauwhede, "Balanced Point Operations for Side-channel Protection of Elliptic Curve Cryptography", IEE Proceedings on Information
• 17: Security: Special Issue on Cryptographic Algo. & Archi. for SoC, pages 57--65, 2005.
• 18: Santosh Ghosh , Monjur Alam , Indranil Sen Gupta , Dipanwita Roy Chowdhury, A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography, Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, p.109-115, August 29-31, 2007 [doi>10.1109/DSD.2007.14]
• 19: Akashi Satoh , Kohji Takano, A Scalable Dual-Field Elliptic Curve Cryptographic Processor, IEEE Transactions on Computers, v.52 n.4, p.449-460, April 2003 [doi>10.1109/TC.2003.1190586]

INDEX TERMS

Primary Classification:
  J. Computer Applications
  J.1 ADMINISTRATIVE DATA PROCESSING
      Subjects: Government

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Algorithms implemented in hardware; Gate arrays

  J. Computer Applications
  J.1 ADMINISTRATIVE DATA PROCESSING
      Subjects: Military

General Terms:
Design, Performance, Security

Keywords:
elliptic curve cryptosystem, gf(p) elliptic curve, power analysis attack, side-channel analysis, timing attack