VHDL vs. Bluespec system verilog: a case study on a Java embedded architecture

ABSTRACT

This paper compares two hardware design flows, based on the classic VHDL on one side and the relatively new Blue-spec System Verilog (BSV) on the other side. The comparison is based on a case study of a Java embedded architecture, comprising a Java native processor and a memory management unit. The processor is a micro-programmed, pipelined, Java-optimized processor (JOP), initially written in VHDL, and its BSV re-designed match BLUEJEP. Its memory management unit implements the bytecodes dealing with memory allocation, along with a mark-compact garbage collector. The two design flows are examined from several points of view, including both quantitative and qualitative measures. Based on this design experience, we conclude that the new high-abstraction level languages, such as BSV, offer in comparison to register-transfer (RT) level classic approaches roughly the same trade-offs that C++ offers vs. assembly language in the software world.

REFERENCES

• 1: IEEE, Standard VHDL Language Reference Manual: IEEE Std 1076--1993. IEEE, August 1994.
• 2: Bluespec, Inc. http://www.bluespec.com, 2007.
• 3: N. Dave. Designing a processor in Bluespec. Master's thesis, MIT, Cambridge, MA, January 2005.
• 4: N. Dave, M. Pellauer, S. Gerding, and Arvind. 802.11a transmitter: A case study in microarchitectural exploration. In International Conference on Formal Methods and Models for Codesign (MEMOCODE '06), pages 59--68, July 2006.
• 5: Daniel D. Gajski , Rainer Domer , Junyu Peng , Andreas Gerstlauer, System Design: A Practical Guide with Specc, Kluwer Academic Publishers, Norwell, MA, 2001
• 6: F. Gruian , P. Andersson , K. Kuchcinski , M. Schoeberl, Automatic generation of application-specific systems based on a micro-programmed Java core, Proceedings of the 2005 ACM symposium on Applied computing, March 13-17, 2005, Santa Fe, New Mexico [doi>10.1145/1066677.1066877]
• 7: F. Gruian and Z. Salcic. Designing a concurrent hardware garbage collector for small embedded systems. In Asia-Pacific Computer Systems Architecture Conference, pages 281--294, 2005.
• 8: Flavius Gruian , Mark Westmijze, BluEJAMM: A Bluespec Embedded Java Architecture with Memory Management, Proceedings of the Ninth International Symposium on Symbolic and Numeric Algorithms for Scientific Computing, p.459-466, September 26-29, 2007 [doi>10.1109/SYNASC.2007.12]
• 9: Flavius Gruian , Mark Westmijze, BlueJEP: a flexible and high-performance Java embedded processor, Proceedings of the 5th international workshop on Java technologies for real-time and embedded systems, September 26-28, 2007, Vienna, Austria [doi>10.1145/1288940.1288973]
• 10: James C. Hoe , Arvind, Hardware Synthesis from Term Rewriting Systems, Proceedings of the IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration: Systems on a Chip, p.595-619, December 01-04, 1999
• 11: M. Schoeberl. JOP: A Java optimized processor. In Workshop on Java Technologies for Real-Time and Embedded Systems, November 2003.
• 12: M. Schoeberl. A time predictable instruction cache for a Java processor. In On the Move to Meaningful Internet Systems 2004: Workshop on Java Technologies for Real-Time and Embedded Systems (JTRES 2004), volume 3292 of LNCS, pages 371--382, Agia Napa, Cyprus, October 2004. Springer.
• 13: M. Schoeberl. JOP: A Java Optimized Processor for Embedded Real-Time Systems. PhD thesis, Vienna University of Technology, January 2005.
• 14: SystemC. the open systemC initiative. http://www.systemc.org.
• 15: Donald E. Thomas , Philip R. Moorby, The Verilog Hardware Description Language, 5th Edition, Kluwer Academic Publishers, Norwell, MA, 2002
• 16: Roland E. Wunderlich , James C. Hoe, In-System FPGA Prototyping of an Itanium Microarchitecture, Proceedings of the IEEE International Conference on Computer Design, p.288-294, October 11-13, 2004
• 17: Xilinx. ChipScope Pro Software and Cores User Guide, v9.1.01 edition, January 2007.
• 18: Xilinx Inc. Http://www.xilinx.com/, 2007.

INDEX TERMS

Primary Classification:
  C. Computer Systems Organization
  C.3 SPECIAL-PURPOSE AND APPLICATION-BASED SYSTEMS

Additional Classification:
  C. Computer Systems Organization
  C.1 PROCESSOR ARCHITECTURES
      C.1.3 Other Architecture Styles

Keywords:
Bluespec, embedded systems, java processor