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Efficient operating system scheduling for performance-asymmetric multi-core architectures
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Conference on High Performance Networking and Computing archive
Proceedings of the 2007 ACM/IEEE conference on Supercomputing - Volume 00 table of contents
Reno, Nevada
SESSION: Scheduling table of contents
Article No. 53  
Year of Publication: 2007
ISBN:978-1-59593-764-3
Authors
Tong Li  Intel Corporation
Dan Baumberger  Intel Corporation
David A. Koufaty  Intel Corporation
Scott Hahn  Intel Corporation
Sponsors
IEEE-CS\DATC : IEEE Computer Society
ACM: Association for Computing Machinery
Publisher
ACM  New York, NY, USA
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ABSTRACT

Recent research advocates asymmetric multi-core architectures, where cores in the same processor can have different performance. These architectures support single-threaded performance and multithreaded throughput at lower costs (e.g., die size and power). However, they also pose unique challenges to operating systems, which traditionally assume homogeneous hardware. This paper presents AMPS, an operating system scheduler that efficiently supports both SMP-and NUMA-style performance-asymmetric architectures. AMPS contains three components: asymmetry-aware load balancing, faster-core-first scheduling, and NUMA-aware migration. We have implemented AMPS in Linux kernel 2.6.16 and used CPU clock modulation to emulate performance asymmetry on an SMP and NUMA system. For various workloads, we show that AMPS achieves a median speedup of 1.16 with a maximum of 1.44 over stock Linux on the SMP, and a median of 1.07 with a maximum of 2.61 on the NUMA system. Our results also show that AMPS improves fairness and repeatability of application performance measurements.


REFERENCES

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CITED BY  7
Collaborative Colleagues:
Tong Li: colleagues
Dan Baumberger: colleagues
David A. Koufaty: colleagues
Scott Hahn: colleagues