Compiler-enhanced incremental checkpointing for OpenMP applications

Subscribe (Full Service)


	Search: The ACM Digital Library The Guide

	Feedback

Compiler-enhanced incremental checkpointing for OpenMP applications

Full text

Pdf (1.09 MB)

Source

Principles and Practice of Parallel Programming archive
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of parallel programming table of contents

Salt Lake City, UT, USA

POSTER SESSION: Poster session table of contents

Pages 275-276

Year of Publication: 2008

ISBN:978-1-59593-795-7

Authors

Greg Bronevetsky	Lawrence Livermore National Laboratory, Livermore, CA, USA
Daniel J. Marques	University of Texas at Austin, Austin, TX, USA
Keshav K. Pingali	University of Texas at Austin, Austin, TX, USA
Radu Rugina	Cornell University, Ithaca, NY, USA
Sally A. McKee	Cornell University, Ithaca, NY, USA

Sponsors

SIGPLAN: ACM Special Interest Group on Programming Languages
ACM: Association for Computing Machinery

Publisher

ACM New York, NY, USA

Bibliometrics

Downloads (6 Weeks): 6, Downloads (12 Months): 64, Citation Count: 0

Additional Information:

abstract references index terms collaborative colleagues

Tools and Actions:	Request Permissions Review this Article Save this Article to a Binder Display Formats: BibTeX EndNote ACM Ref

DOI Bookmark:	Use this link to bookmark this Article: http://doi.acm.org/10.1145/1345206.1345253 What is a DOI?

ABSTRACT

As modern supercomputing systems reach peta-flop performance they grow in both size and complexity, becoming increasingly vulnerable to failures. Checkpointing is a popular technique for tolerating such failures. Although a variety of automated system-level checkpointing solutions are currently available to HPC users, manual application-level checkpointing remains more popular due to its superior performance. This paper improves performance of automated checkpointing by presenting a compiler analysis for incremental checkpointing. This analysis, which works with both sequential and OpenMP applications, significantly reduces checkpoint sizes and enables asynchronous checkpointing.

REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

	1	http://phase.hpcc.jp/Omni/benchmarks/NPB.
	2	Sarah E. Michalak, Kevin W. Harris, Nicolas W. Hengartner, Bruce E. Takala, and Stephen A. Wender. Predicting the number of fatal soft errors in los alamos national laboratorys asc q supercomputer. IEEE Transactions on Device and Materials Reliability, 5(3), 2005.
	3	James S. Plank, Micah Beck, and Gerry Kingsley. Compiler-assisted memory exclusion for fast checkpointing. IEEE Technical Committee on Operating Systems and Application Environments, 7(4).
	4	Jose Carlos Sancho, Fabrizio Petrini, Greg Johnson, Juan Fernandez, and Eitan Frachtenberg. On the feasibility of incremental checkpointing for scientific computing. In 18th International Parallel and Distributed Processing Symposium (IPDPS), 2004.
	5	Bianca Schroeder , Garth A. Gibson, A large-scale study of failures in high-performance computing systems, Proceedings of the International Conference on Dependable Systems and Networks, p.249-258, June 25-28, 2006 [doi>10.1109/DSN.2006.5]
	6	Kun Zhang , Santosh Pande, Efficient application migration under compiler guidance, Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, June 15-17, 2005, Chicago, Illinois, USA