High-throughput interconnect wave-pipelining for global communication in FPGAs

ABSTRACT

Global interconnection is fundamental to high bandwidth links for inter-module communication in FPGAs. The long range global interconnections at high clock frequencies are becoming more problematic. This is due to the large circuit delay and leakage power caused by interconnect switches along the line. The delay is worsen by the global interconnect deterioration in technology scaling. In this paper, we address this problem by presenting an interconnect wave-pipelining strategy by using the existing programmable interconnects fabrics to provide high-throughput global communication in FPGA. A novel global interconnection circuit model is presented and, from the model, interconnection throughput can be derived. The model has been verified using SPICE simulation and delay results from the Xilinx FPGA Editor. We demonstrate the feasibility of our proposal by implementing a wave-pipelined interconnect circuit in a Xilinx Virtex-5 FPGA device. The circuit is able to achieve a throughput that is 3 times faster than a conventional synchronous approach. We conclude this paper by having a discussion about two strategies to further enhance the wave-pipelining throughput

INDEX TERMS

Primary Classification:
  B. Hardware
  B.4 INPUT/OUTPUT AND DATA COMMUNICATIONS
      B.4.3 Interconnections (subsystems)

Additional Classification:
  B. Hardware
  B.7 INTEGRATED CIRCUITS
      B.7.1 Types and Design Styles
          Subjects: Gate arrays