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A design framework for real-time embedded systems with code size and energy constraints
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ACM Transactions on Embedded Computing Systems (TECS) archive
Volume 7 ,  Issue 2  (February 2008) table of contents
Article No. 18  
Year of Publication: 2008
ISSN:1539-9087
Authors
Sheayun Lee  Samsung Electronics Co., Ltd., Gyeonggi-Do, Korea
Insik Shin  University of Pennsylvania, Philadelphia, Pennsylvania
Woonseok Kim  Samsung Electronics Co., Ltd., Gyeonggi-Do, Korea
Insup Lee  University of Pennsylvania, Philadelphia, Pennsylvania
Sang Lyul Min  Seoul National University, Seoul, Korea
Publisher
ACM  New York, NY, USA
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ABSTRACT

Real-time embedded systems are typically constrained in terms of three system performance criteria: space, time, and energy. The performance requirements are directly translated into constraints imposed on the system's resources, such as code size, execution time, and energy consumption. These resource constraints often interact or even conflict with each other in a complex manner, making it difficult for a system developer to apply a well-defined design methodology in developing a real-time embedded system. Motivated by this observation, we propose a design framework that can flexibly balance the tradeoff involving the system's code size, execution time, and energy consumption. Given a system specification and an optimization criteria, the proposed technique generates a set of design parameters in such a way that a system cost function is minimized while the given resource constraints are satisfied. Specifically, the technique derives code generation decision for each task so that a specific version of code is selected among a number of different ones that have distinct characteristics in terms of code size and execution time. In addition, the design framework determines the voltage/frequency setting for a variable voltage processor whose supply voltage can be adjusted at runtime in order to minimize the energy consumption while execution performance is degraded accordingly. The proposed technique formulates this design process as a constrained optimization problem. We show that this optimization problem is NP-hard and then provide a heuristic solution to it. We show that these seemingly conflicting design goals can be pursued by using a simple optimization algorithm that works with a single optimization criteria. Moreover, the optimization is driven by an abstract system specification given by the system developer, so that the system development process can be automated. The results from our simulation show that the proposed algorithm finds a solution that is close to the optimal one with the average error smaller than 1.0&percent;.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
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Lee, S., Lee, J., Min, S. L., Hiser, J., and Davidson, J. W. 2003. Code generation for a dual instruction set processor based on selective code transformation. In Proceedings of the 7th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Vienna, Austria, 33--48.
 
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Lee, S., Lee, J., Park, C. Y., and Min, S. L. 2004. A flexible tradeoff between code size and WCET using a dual instruction set processor. In Proceedings of the 8th International Workshop on Software and Compilers for Embedded Systems (SCOPES). Amsterdam, The Netherlands. 244--258.
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Shin, I., Lee, I., and Min, S. L. 2004. A design approach for real-time embedded systems with energy and code size constraints. In Proceedings of the 10th Real-time and Embedded Computing Systems and Applications Conference (RTCSA), Gothenburg, Sweden.
 
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Collaborative Colleagues:
Sheayun Lee: colleagues
Insik Shin: colleagues
Woonseok Kim: colleagues
Insup Lee: colleagues
Sang Lyul Min: colleagues