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Flow-slice: a novel load-balancing scheme for multi-path switching systems
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Symposium On Architecture For Networking And Communications Systems archive
Proceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems table of contents
Orlando, Florida, USA
POSTER SESSION: Poster session table of contents
Pages 45-46  
Year of Publication: 2007
ISBN:978-1-59593-945-6
Authors
Lei Shi  Tsinghua University, Beijing, China
Bin Liu  Tsinghua University, Beijing, China
Changhua Sun  Tsinghua University, Beijing, China
Zhengyu Yin  Tsinghua University, Beijing, China
Laxmi Bhuyan  University of California, Riverside, CA
H. Jonathan Chao  Polytechnic University, Brooklyn, NY
Sponsors
SIGARCH: ACM Special Interest Group on Computer Architecture
ACM: Association for Computing Machinery
SIGCOMM: ACM Special Interest Group on Data Communication
Publisher
ACM  New York, NY, USA
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ABSTRACT

Multi-Path Switching systems (MPS) are intensively used in the state-of-the-art core routers. One of the most intractable issues is how to load-balance traffic across its multiple paths while not disturbing the intra-flow packet orders. In this paper, based on the studies of tens of real Internet traces, we develop a novel scheme, namely Flow-Slice (FS), which cuts off each flow into flow-slices at every intra-flow interval larger than a slicing threshold set to 1ms 4ms and balances the load on the finer granularity. Through theoretical analyses and comprehensive trace-driven simulations, we show that FS achieves impressive load-balancing performance with little hardware cost while limiting the packet out-of-order chances to a negligible level (below 10 -6).


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
J. S. Turner, "Resequencing Cells in an ATM Switch," Tech. Rep., WUCS-91--21, Feb. 1991.
 
2
D. A. Khotimsky and S. Krishnan, "Evaluation of Open-loop Sequence Control Schemes for Multi-path Switches," in Proc. IEEE ICC, pp. 2116--2120, 2002.
 
3
L. Shi, W. Li, B. Liu, and X. Wang, "Flow Mapping in the Load Balancing Parallel Packet Switches," in Proc. IEEE HPSR, pp. 254--258, 2005.

Collaborative Colleagues:
Lei Shi: colleagues
Bin Liu: colleagues
Changhua Sun: colleagues
Zhengyu Yin: colleagues
Laxmi Bhuyan: colleagues
H. Jonathan Chao: colleagues