ACM Home Page
Please provide us with feedback. Feedback
An evaluation of the Chandy-Misra-Bryant algorithm for digital logic simulation
Full text PdfPdf (2.64 MB)
Source ACM Transactions on Modeling and Computer Simulation (TOMACS) archive
Volume 1 ,  Issue 4  (October 1991) table of contents
Special issue on parallel and distributed systems performance
Pages: 308 - 347  
Year of Publication: 1991
ISSN:1049-3301
Authors
Larry Soulé  Computer Systems Laboratory
Anoop Gupta  Computer Systems Laboratory
Publisher
ACM  New York, NY, USA
Bibliometrics
Downloads (6 Weeks): 7,   Downloads (12 Months): 37,   Citation Count: 9
Additional Information:

abstract   references   cited by   index terms   collaborative colleagues  

Tools and Actions: Request Permissions Request Permissions    Review this Article  
DOI Bookmark: Use this link to bookmark this Article: http://doi.acm.org/10.1145/130611.130613
What is a DOI?

ABSTRACT

We explore the suitability of the Chandy-Misra-Bryant (CMB) algorithm for the domain of digital logic simulation. Our evaluation is based on results for six realistic benchmark circuits, one of them being the R6000 microprocessor form MIPS. A quantitative evaluation of the concurrency exhibited by the CMB algorithm shows that an average of 42-196 element activations can be evaluated in parallel if arbitrarily many processors are available. One major factor limiting the parallel performance is the large number of deadlocks that occur. We present a classification of the types of deadlocks and describe them in terms of circuit structure. Using domain-specific knowledge, we propose and evaluate several methods for both reducing the number of deadlock occurences and for reducing the time spent on each occurence. Running on a 16-processor Encore Multimax we observe speedups of 6-9. While these self-relative speedups are larger than a parallel version of the traditional centralized-time event-driven algorithm, they come at the price of large overheads: significantly more complex element evaluations, extra element evaluations, and deadlock resolution time. These overheads overwhelm the advantages of using distributed time and consistently make the parallel performance of the CMB algorithm about three times slower than that of the traditional parallel event-driven algorithm. Our experience leads us to conclude that the distributed-time CMB algorithm does not present a viable alternative to the centralized-time event-driven algorithm in the domain of parallel digital logic simulation.


REFERENCES

Note: OCR errors may be found in this Reference List extracted from the full text article. ACM has opted to expose the complete List rather than only correct and linked references.

 
1
 
2
BLANK, T. A survey of hardware accelerators used in computer-aided design. IEEE Des. Test Comput. (Aug 1984), 21 39.
3
 
4
5
 
6
DAVIS, H., GOLDSCHMIDT, S., AND HENNESSY, J. Mult~processing s~mulation and tracing using Tango. In Proceedlngs of the International Conference on Parallel Proces~'Ing 1991.
 
7
 
8
 
9
FUJiMOTO, R. Lookahead in parallel discrete event simulation. In The 1988 International Conference on Parallel Processing. 1988, pp. 34 41.
10
11
 
12
13
 
14
LIN, Y.-B., LAZOWSK& E. D., AND BArnEY, M. L.. Comparing synchronization protocols for parallel logac-level simulation. Tech. Rep. 89-09-06, Dept. of Computer Science and Engineerrag, Umv of Washington, 19,q9.
15
16
 
17
18
 
19
20
 
21
22
 
23
24
 
25
WAGNER, D., LAZOWSKA, E., AND BERSHAD, B. Techniques for efficient shared-memory parallel simulation. Tech. Rep. 88-04-05, Univ. of Washington, Dept. of Computer Science, 1988.
26
27
 
28
WILSON, A. Parallelization of an event driven simulator on the Encore Multimax. Tech. Rep. ETR 86-005, Encore Computer, 1986.
 
29

CITED BY  9

Collaborative Colleagues:
Larry Soulé: colleagues
Anoop Gupta: colleagues